In digital electronics, the power–delay product (PDP) is a figure of merit correlated with the energy efficiency of a

logic gate A logic gate is an idealized or physical device implementing a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic gate, ...

or logic family. Also known as switching energy, it is the product of power consumption ''P'' (averaged over a switching event) times the input–output delay or duration of the switching event ''D''. It has the dimension of energy and measures the energy consumed per switching event. In a

CMOS Complementary metal–oxide–semiconductor (CMOS, pronounced "sea-moss", ) is a type of metal–oxide–semiconductor field-effect transistor (MOSFET) fabrication process that uses complementary and symmetrical pairs of p-type and n-type MOSFE ...

circuit the switching energy and thus the PDP for a 0-to-1-to-0 computation cycle is C_L·V_DD². Therefore, lowering the supply voltage V_DD lowers the PDP. Energy-efficient circuits with a low PDP may also be performing very slowly, thus energy–delay product (EDP), the product of ''E'' and ''D'' (or ''P'' and ''D''²), is sometimes a preferable metric. In CMOS circuits the delay is inversely proportional to the supply voltage V_DD and hence EDP is proportional to V_DD. Consequently, lowering V_DD also benefits EDP.

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