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PICA200 is a
graphics processing unit A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device. GPUs are used in embedded systems, mobi ...
(GPU) designed by Digital Media Professionals Inc. (DMP), a Japanese GPU design startup company, for use in embedded devices such as vehicle systems, mobile phones, cameras, and game consoles. The PICA200 is an
IP Core In electronic design, a semiconductor intellectual property core (SIP core), IP core, or IP block is a reusable unit of logic, cell, or integrated circuit layout design that is the intellectual property of one party. IP cores can be licensed to ...
which can be licensed to other companies to incorporate into their
SOCs SOCS (suppressor of cytokine signaling proteins) refers to a family of genes involved in inhibiting the JAK-STAT signaling pathway. Genes * CISH * SOCS1 * SOCS2 * SOCS3 * SOCS4 * SOCS5 * SOCS6 * SOCS7 Suppressor of cytokine signaling 7 is a pro ...
. It was most notably licensed for use in the
Nintendo 3DS The is a handheld game console produced by Nintendo. It was announced in March 2010 and unveiled at E3 2010 as the successor to the Nintendo DS. The system features backward compatibility with Nintendo DS video games. As an eighth-generatio ...
. It was announced at SIGGRAPH 2005, and an operational demo, "Mikage", was presented in collaboration with
Futuremark Futuremark Oy was a Finnish software development company that produced computer benchmark applications for home, business, and press use. Futuremark was acquired by UL on 31 October 2014, and was formally merged into the company on 23 April 2 ...
at SIGGRAPH 2006.


Overview

The PICA200 is the successor to the
ULTRAY2000 ULTRAY2000 is a concept chip for 3D graphics processing designed by Digital Media Professionals Inc. (DMP), a Japanese GPU design company. It was used for real-time 3D graphics. It was produced in 0.13µm TSMC manufacturing process and contained mo ...
, a proof of concept graphics workstation presented at SIGGRAPH 2005, created with the goal of testing DMP's attempts at a low power fixed-function "MAESTRO" GPU architecture. The PICA200 implements the "MAESTRO-2G" architecture and supports programmable vertex shaders and geometry shaders, with a fixed-function fragment stage. It is advertised as supporting
OpenGL ES OpenGL for Embedded Systems (OpenGL ES or GLES) is a subset of the OpenGL computer graphics rendering application programming interface (API) for rendering 2D and 3D computer graphics such as those used by video games, typically hardware-accel ...
1.1 with certain proprietary extensions. The PICA200 has up to 4 programmable vertex processors which can work in parallel. One of those processors, the "primitive engine", can be used as either vertex processor or a geometry processor. Some MAESTRO-2G extensions include, per-pixel lighting (where the lighting is calculated per pixel instead of per vertex), procedural texture generation, bidirectional reflectance distribution function (BRDF), Cook-Torrance specular highlights, polygon subdivision (through geometry shaders), soft shadow projection, and fake subsurface scattering (similar to two-sided lighting).


Applications

The PICA200 is used as the GPU for the
Nintendo 3DS The is a handheld game console produced by Nintendo. It was announced in March 2010 and unveiled at E3 2010 as the successor to the Nintendo DS. The system features backward compatibility with Nintendo DS video games. As an eighth-generatio ...
portable
handheld game console A handheld game console, or simply handheld console, is a small, portable self-contained video game console with a built-in screen, game controls and speakers. Handheld game consoles are smaller than home video game consoles and contain the cons ...
.


Specification

* Manufacturing process:
65 nm The 65  nm process is an advanced lithographic node used in volume CMOS (MOSFET) semiconductor fabrication. Printed linewidths (i.e. transistor gate lengths) can reach as low as 25 nm on a nominally 65 nm process, while the pitch ...
* Maximum clock frequency 400 MHz * Pixel performance (theoretical): **400 Megapixel/s @100 MHz **800 Megapixel/s @200 MHz * Vertex performance (theoretical): **40Mtriangle/s @100 MHz **15.3Mpolygon/s @200 MHz * Power consumption: 0.5-1.0 mW/MHz * Frame Buffer max. 4095×4095 pixels * Supported pixel formats: RGBA4444, RGB565, RGBA5551, RGBA8888 * Vertex program ''(ARB_vertex_program)'' *
Render to Texture This is a glossary of terms relating to computer graphics. For more general computer hardware terms, see glossary of computer hardware terms. 0–9 A B ...
* Hardware Transform and Lighting(T&L) *
MipMap In computer graphics, mipmaps (also MIP maps) or pyramids are pre-calculated, optimized sequences of images, each of which is a progressively lower resolution representation of the previous. The height and width of each image, or level, in the m ...
* Bilinear texture filtering *
Alpha blending In computer graphics, alpha compositing or alpha blending is the process of combining one image with a background to create the appearance of partial or full transparency. It is often useful to render picture elements (pixels) in separate pas ...
* Full-scene anti-aliasing (2×2) * Phong Shading * Cel Shading * Perspective-Correct Texture Mapping * Dot3 Bump Mapping/Normal Mapping. * Shadow Mapping * Shadow Volumes * Self-Shadowing * Lightmapping * Environment Mapping/Reflection Mapping * Volumetric Fog * Post-processing effects like motion, bloom, depth of field, HDR rendering, gamma correction * Polygon offset * Depth Test, Stencil Test, Alpha Test. * Clipping, Culling * 8-bit stencil buffer * 24-bit depth buffer * Single/Double/Triple buffer * 5-Stage TEV Pipeline * TEV Combiner Buffer(Only the first four TEV stages can write to the combiner buffer) * Color Combiners, Alpha Combiners, Texture Combiners. * ''DMP's MAESTRO-2G'' technology: ** per-pixel lighting ** fake sub-surface scattering ** procedural texture ** refraction mapping ** subdivision primitive ** shadow ** gaseous object rendering ** bidirectional reflectance distribution function ** Cook-Torrance Model ** polygon subdivision ** soft shadowing


References


External links


PICA200 3D Graphics IP

PICA200 block diagram

SIGGRAPH 2006 - 日本発のGPUテクノロジー「PICA200」が公開 (August 15, 2006)

ニンテンドー3DSにDMPの3DグラフィックスIPコア「PICA200」が採用された理由 (June 22, 2010)
{{DEFAULTSORT:Pica200 Graphics hardware Graphics processing units Nintendo chips