OpenCores is a community developing digital open-source hardware through electronic design automation (EDA), with a similar ethos as the

free software movement The free software movement is a social movement with the goal of obtaining and guaranteeing certain freedoms for software users, namely the freedoms to run the software, to study the software, to modify the software, and to share copies of the s ...

. OpenCores hopes to eliminate redundant design work and slash development costs. A number of companies have been reported as adopting OpenCores IP in chips,Andrew Orlowski, "Flextronics demos open source chips", ''The Register'', 12 December 2003

/ref> or as adjuncts to EDA tools. OpenCores is also cited from time to time in the electronics press as an example of open source in the electronics hardware community. OpenCores has always been a commercially owned organization. In 2015, the core active users of OpenCores established the independent Free and Open Source Silicon Foundation (FOSSi Foundation), and registered the libreCores.org website as the basis for all future development, independent of commercial control.

History

Damjan Lampret, one of the founders of OpenCores, stated on his website that it began in 1999. The first public record of the new website and its objectives was in ''EE Times'' in 2000. Then CNET News reported in 2001. Through the following years it was supported by advertising and sponsorship, including by Flextronics. In mid-2007 an appeal was put out for a new backer, and that November, Swedish design house ORSoC AB agreed to take over maintenance of the OpenCores website. ''EE Times'' reported in late 2008 that OpenCores had passed the 20,000 subscriber mark. In October 2010 it reached 95,000 registered users and had approximately 800 projects. In July 2012 it reached 150,000 registered users. During 2015, ORSoC AB formed a joint venture with KNCMiner AB to develop bitcoin mining machines. As this became the primary focus of the business, they were able to spend less time with the opencores.org project. In response to the growing lack of commitment, the core

OpenRISC OpenRISC is a project to develop a series of open-source hardware based central processing units (CPUs) on established reduced instruction set computer (RISC) principles. It includes an instruction set architecture (ISA) using an open-source lic ...

development team set up the Free and Open Source Silicon Foundation (FOSSi), and registered th
librecores.org
website as the basis for all future development, independent of commercial control.

Licensing

In the absence of a widely accepted open source hardware license, the components produced by the OpenCores initiative use several different

software license A software license is a legal instrument (usually by way of contract law, with or without printed material) governing the use or redistribution of software. Under United States copyright law, all software is copyright protected, in both source ...

s. The most common is the GNU LGPL, which states that any modifications to a component must be shared with the community, while one can still use it together with proprietary components. The less restrictive

3-clause BSD license BSD licenses are a family of permissive free software licenses, imposing minimal restrictions on the use and distribution of covered software. This is in contrast to copyleft licenses, which have share-alike requirements. The original BSD lice ...

is also used in some hardware projects, while the GNU GPL is often used for software components, such as models and firmware.

The OpenCores library

The library will consist of design elements from

central processing unit A central processing unit (CPU), also called a central processor, main processor or just Processor (computing), processor, is the electronic circuitry that executes Instruction (computing), instructions comprising a computer program. The CPU per ...

memory controller The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an int ...

s, peripherals, motherboards, and other components. Emerging

semiconductor A semiconductor is a material which has an electrical conductivity value falling between that of a conductor, such as copper, and an insulator, such as glass. Its resistivity falls as its temperature rises; metals behave in the opposite way. ...

manufacturers could use the information and license designs for free. The emphasis is on digital modules called "cores", commonly known as

IP Core In electronic design, a semiconductor intellectual property core (SIP core), IP core, or IP block is a reusable unit of logic, cell, or integrated circuit layout design that is the intellectual property of one party. IP cores can be licensed to ...

s. The components are used for creating both custom integrated circuits ( ASICs) and FPGAs. The cores are implemented in the

hardware description language In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, and most commonly, digital logic circuits. A hardware description language en ...

Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is als ...

VHDL The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gate ...

or SystemC which may be synthesized to either silicon or

gate array A gate array is an approach to the design and manufacture of application-specific integrated circuits (ASICs) using a prefabricated chip with components that are later interconnected into logic devices (e.g. NAND gates, flip-flops, etc.) according ...

s. The project aims at using a common non-proprietary system bus named Wishbone, and most components are nowadays adapted to this bus. Among the components created by OpenCores contributors are: *

– a highly configurable RISC central processing unit * Amber (processor core) – an

ARM In human anatomy, the arm refers to the upper limb in common usage, although academically the term specifically means the upper arm between the glenohumeral joint (shoulder joint) and the elbow joint. The distal part of the upper limb between th ...

-compatible RISC central processing unit * A

Zilog Z80 The Z80 is an 8-bit microprocessor introduced by Zilog as the startup company's first product. The Z80 was conceived by Federico Faggin in late 1974 and developed by him and his 11 employees starting in early 1975. The first working samples were ...

clone * USB 2.0 controller * Tri

Ethernet Ethernet () is a family of wired computer networking technologies commonly used in local area networks (LAN), metropolitan area networks (MAN) and wide area networks (WAN). It was commercially introduced in 1980 and first standardized in 1 ...

controller, 10/100/1000 Mbit *

Encryption In cryptography, encryption is the process of encoding information. This process converts the original representation of the information, known as plaintext, into an alternative form known as ciphertext. Ideally, only authorized parties can de ...

units, for example DES, AES and RSA *

HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...

Tunnel * A PIC16F84 core * Zet – an

x86 x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was intr ...

compatible core

OpenRISC ASIC

In April 2011 OpenCores opened donationsCall for OpenRISC ASIC donations, 30 April 2011
for a new project to develop a complete system on a chip design based on the OpenRISC processor and implement it into an ASIC-component. OpenCores affiliated with OpenCores, for example

OpenSPARC OpenSPARC is an open-source hardware project started in December 2005. The initial contribution to the project was Sun Microsystems' register-transfer level (RTL) Verilog code for a full 64-bit, 32- thread microprocessor, the UltraSPARC T1 process ...

and

LEON Leon, Léon (French) or León (Spanish) may refer to: Places Europe * León, Spain, capital city of the Province of León * Province of León, Spain * Kingdom of León, an independent state in the Iberian Peninsula from 910 to 1230 and again f ...

References

External links