OpenVera was a
hardware verification language
A hardware verification language, or HVL, is a programming language used to verify the designs of electronic circuits written in a hardware description language. HVLs typically include features of a high-level programming language like C++ or Java ...
developed by System Science and acquired by
Synopsys
Synopsys is an American electronic design automation (EDA) company that focuses on silicon design and verification, silicon intellectual property and software security and quality. Products include tools for logic synthesis and physical design ...
.
See also
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e (verification language)
e is a hardware verification language (HVL) which is tailored to implementing highly flexible and reusable verification testbenches.
History
''e'' was first developed in 1992 in Israel by Yoav Hollander for his Specman software. In 1995 h ...
*
SystemVerilog
SystemVerilog, standardized as IEEE 1800, is a hardware description and hardware verification language used to model, design, simulate, test and implement electronic systems. SystemVerilog is based on Verilog and some extensions, and since 200 ...
References
External links
Hardware verification languages
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