MyHDL
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MyHDL is a
Python Python may refer to: Snakes * Pythonidae, a family of nonvenomous snakes found in Africa, Asia, and Australia ** ''Python'' (genus), a genus of Pythonidae found in Africa and Asia * Python (mythology), a mythical serpent Computing * Python (pro ...
-based
hardware description language In computer engineering, a hardware description language (HDL) is a specialized computer language used to describe the structure and behavior of electronic circuits, and most commonly, digital logic circuits. A hardware description language en ...
(HDL). Features of MyHDL include: * The ability to generate
VHDL The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gate ...
and
Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is als ...
code from a MyHDL design. * The ability to generate a testbench (Conversion of test benches) with test vectors in VHDL or Verilog, based on complex computations in Python. * The ability to convert a list of signals. * The ability to convert output verification. * The ability to do co-simulation with Verilog. * An advanced datatype system, independent of traditional datatypes. MyHDL's translator tool automatically writes conversion functions when the target language requires them. MyHDL is developed by Jan Decaluwe.


Conversion examples

Here, you can see some examples of conversions from MyHDL designs to VHDL and/or Verilog. A small combinatorial design The example is a small combinatorial design, more specifically the binary to Gray code converter: def bin2gray(B, G, width: int): """Gray encoder. B -- input intbv signal, binary encoded G -- output intbv signal, gray encoded width -- bit width """ @always_comb def logic(): Bext = intbv(0) idth + 1 : Bext = B for i in range(width): G.next = Bext + 1^ Bext return logic You can create an instance and convert to Verilog and VHDL as follows: width = 8 B = Signal(intbv(0) idth: G = Signal(intbv(0) idth: bin2gray_inst = toVerilog(bin2gray, B, G, width) bin2gray_inst = toVHDL(bin2gray, B, G, width) The generated Verilog code looks as follows: module bin2gray ( B, G ); input :0B; output :0G; reg :0G; always @(B) begin: BIN2GRAY_LOGIC integer i; reg -1:0Bext; Bext = 9'h0; Bext = B; for (i=0; i<8; i=i+1) begin G <= (Bext i + 1)^ Bext ; end end endmodule The generated VHDL code looks as follows: library IEEE; use IEEE.std_logic_1164.all; use IEEE.numeric_std.all; use std.textio.all; use work.pck_myhdl_06.all; entity bin2gray is port ( B: in unsigned(7 downto 0); G: out unsigned(7 downto 0) ); end entity bin2gray; architecture MyHDL of bin2gray is begin BIN2GRAY_LOGIC: process (B) is variable Bext: unsigned(8 downto 0); begin Bext := to_unsigned(0, 9); Bext := resize(B, 9); for i in 0 to 8-1 loop G(i) <= (Bext((i + 1)) xor Bext(i)); end loop; end process BIN2GRAY_LOGIC; end architecture MyHDL;


See also

*
Comparison of Free EDA software This page is a comparison of electronic design automation (EDA) software which is used today to design the near totality of electronic devices. Modern electronic devices are too complex to be designed without the help of a computer. Electronic dev ...
*
Comparison of EDA Software This page is a comparison of electronic design automation (EDA) software which is used today to design the near totality of electronic devices. Modern electronic devices are too complex to be designed without the help of a computer. Electronic dev ...
* Electronic design automation (EDA) *
C to HDL C to HDL tools convert C language or C-like computer code into a hardware description language (HDL) such as VHDL or Verilog. The converted code can then be synthesized and translated into a hardware device such as a field-programmable gate arr ...
compilers


References

{{Programmable Logic Hardware description languages