electronics The field of electronics is a branch of physics and electrical engineering that deals with the emission, behaviour and effects of electrons using electronic devices. Electronics uses active devices to control electron flow by amplification ...

, metastability is the ability of a

digital electronic Digital electronics is a field of electronics involving the study of digital signals and the engineering of devices that use or produce them. This is in contrast to analog electronics and analog signals. Digital electronic circuits are usually ...

system to persist for an unbounded time in an unstable equilibrium or

metastable In chemistry and physics, metastability denotes an intermediate energetic state within a dynamical system other than the system's state of least energy. A ball resting in a hollow on a slope is a simple example of metastability. If the ball i ...

state. In

digital logic A logic gate is an idealized or physical device implementing a Boolean function, a logical operation performed on one or more binary inputs that produces a single binary output. Depending on the context, the term may refer to an ideal logic ga ...

circuits, a digital signal is required to be within certain

voltage Voltage, also known as electric pressure, electric tension, or (electric) potential difference, is the difference in electric potential between two points. In a static electric field, it corresponds to the work needed per unit of charge t ...

or current limits to represent a '0' or '1'

logic level In digital circuits, a logic level is one of a finite number of states that a digital signal can inhabit. Logic levels are usually represented by the voltage difference between the signal and ground, although other standards exist. The range of ...

for correct circuit operation; if the signal is within a forbidden intermediate range it may cause faulty behavior in logic gates the signal is applied to. In metastable states, the circuit may be unable to settle into a stable '0' or '1' logic level within the time required for proper circuit operation. As a result, the circuit can act in unpredictable ways, and may lead to a system failure, sometimes referred to as a "glitch". Metastability is an instance of the

Buridan's ass Buridan's ass is an illustration of a paradox in philosophy in the conception of free will. It refers to a hypothetical situation wherein an ass (donkey) that is equally hungry and thirsty is placed precisely midway between a stack of hay and a p ...

paradox. Metastable states are inherent features of asynchronous digital systems, and of systems with more than one independent

clock A clock or a timepiece is a device used to measure and indicate time. The clock is one of the oldest human inventions, meeting the need to measure intervals of time shorter than the natural units such as the day, the lunar month and t ...

domain. In self-timed asynchronous systems, arbiters are designed to allow the system to proceed only after the metastability has resolved, so the metastability is a normal condition, not an error condition. In synchronous systems with asynchronous inputs, synchronizers are designed to make the probability of a synchronization failure acceptably small. Metastable states are avoidable in fully synchronous systems when the input setup and hold time requirements on flip-flops are satisfied.

Example

A simple example of metastability can be found in an SR NOR latch, when Set and Reset inputs are true (R=1 and S=1) and then both transition to false (R=0 and S=0) at about the same time. Both outputs Q and are initially held at 0 by the simultaneous Set and Reset inputs. After both Set and Reset inputs change to false, the flip-flop will (eventually) end up in one of two stable states, one of Q and true and the other false. The final state will depend on which of R or S returns to zero first, chronologically, but if both transition at about the same time, the resulting metastability, with intermediate or oscillatory output levels, can take arbitrarily long to resolve to a stable state.

Arbiters

In electronics, an ''arbiter'' is a circuit designed to determine which of several signals arrive first. Arbiters are used in asynchronous circuits to order computational activities for shared resources to prevent concurrent incorrect operations. Arbiters are used on the inputs of fully synchronous systems, and also between clock domains, as synchronizers for input signals. Although they can minimize the occurrence of metastability to very low probabilities, all arbiters nevertheless have metastable states, which are unavoidable at the boundaries of regions of the input

state space A state space is the set of all possible configurations of a system. It is a useful abstraction for reasoning about the behavior of a given system and is widely used in the fields of artificial intelligence and game theory. For instance, the t ...

resulting in different outputs.

Synchronous circuits

Synchronous circuit In digital electronics, a synchronous circuit is a digital circuit in which the changes in the state of memory elements are synchronized by a clock signal. In a sequential digital logic circuit, data are stored in memory devices called flip-fl ...

design techniques make digital circuits that are resistant to the failure modes that can be caused by metastability. A clock domain is defined as a group of flip-flops with a common clock. Such architectures can form a circuit guaranteed free of metastability (below a certain maximum clock frequency, above which first metastability, then outright failure occur), assuming a low- skew common clock. However, even then, if the system has a dependence on any continuous inputs then these are likely to be vulnerable to metastable states. When synchronous design techniques are used, protection against metastable events causing systems failures need only be provided when transferring data between different clock domains or from an unclocked circuitry into a clocked one (synchronous). This protection can often take the form of a series of delay flip-flops which delay the data stream long enough for metastability failures to occur at a negligible rate.

Failure modes

Although metastability is well understood and architectural techniques to control it are known, it persists as a

failure mode Failure causes are defects in design, process, quality, or part application, which are the underlying cause of a failure or which initiate a process which leads to failure. Where failure depends on the user of the product or process, then human er ...

in equipment. Serious computer and digital hardware bugs caused by metastability have a fascinating social history. Many engineers have refused to believe that a bistable device can enter into a state that is neither ''true'' nor ''false'' and has a positive probability that it will remain indefinite for any given period of time, albeit with exponentially decreasing probability over time., p. 4-6, p. 196, 200, eq. 6-29, p. 4-5, eq. 1-1 However, metastability is an inevitable result of any attempt to map a continuous domain to a discrete one. At the boundaries in the continuous domain between regions which map to different discrete outputs, points arbitrarily close together in the continuous domain map to different outputs, making a decision as to which output to select a difficult and potentially lengthy process. If the inputs to an arbiter or flip-flop arrive almost simultaneously, the circuit most likely will traverse a point of metastability. Metastability remains poorly understood in some circles, and various engineers have proposed their own circuits said to solve or filter out the metastability; typically these circuits simply shift the occurrence of metastability from one place to another.Ran Ginosar.
Fourteen Ways to Fool Your Synchronizer
ASYNC 2003. Chips using multiple clock sources are often tested with tester clocks that have fixed phase relationships, not the independent clocks drifting past each other that will be experienced during operation. This usually explicitly prevents the metastable failure mode that will occur in the field from being seen or reported. Proper testing for metastability frequently employs clocks of slightly different frequencies and ensuring correct circuit operation.

References

External links

Metastability Performance of Clocked FIFOs

The 'Asynchronous' Bibliography

Asynchronous Logic

* ttp://www.fpga-faq.org/FAQ_Pages/0017_Tell_me_about_metastables.htm Detailed explanations and Synchronizer designs
Metastability Bibliography

Clock Domain Crossing: Closing the Loop on Clock Domain Functional Implementation Problems
Cadence Design Systems * Stephenson, Jennifer
Understanding Metastability in FPGAs
Altera Corporation white paper. July 2009. * Bahukhandi, Ashirwad. Metastability. Lecture Notes for Advanced Logic Design and Switching Theory. January 2002. * Cummings, Clifford E
Synthesis and Scripting Techniques for Designing Multi-Asynchronous Clock Designs
SNUG 2001. * Haseloff, Eilhard
Metastable Response in 5-V Logic Circuits
Texas Instruments Report. February 1997. * Nystrom, Mika, and Alain J. Martin
Crossing the Synchronous Asynchronous Divide
WCED 2002. *Patil, Girish, IFV Division, Cadence Design Systems. Clock Synchronization Issues and Static Verification Techniques. Cadence Technical Conference 2004.
Smith, Michael John Sebastian. Application-Specific Integrated Circuits.
Addison Wesley Longman, 1997, Chapter 6.4.1. * Stein, Mike
Crossing the abyss: asynchronous signals in a synchronous world
EDN design feature. July 24, 2003. * Cox, Jerome R. and Engel, George L., Blendics, Inc. White Pape

"Metastability and Fatal System Errors"] Nov. 2010 * Adam Taylor
"Wrapping One's Brain Around Metastability"
EE Times, 2013-11-20 {{DEFAULTSORT:Metastability In Electronics Electrical engineering Digital electronics