The MaverickCrunch is a
floating point math coprocessor core intended for digital audio. It was first presented by
Cirrus Logic in June 2000 together with an
ARM920T integer processor in their 200 MHz EP9302 EP9307 EP9312 and EP9315 System-on-Chip integrated circuits. Plagued with
hardware bug A hardware bug is a defect in the design, manufacture, or operation of computer hardware that causes incorrect operation. It is the counterpart of software bugs which refer to flaws in the code which operates computers, and is the original context i ...
s and poor compiler support, it was seldom used in any of the devices based on those chips and the product line was discontinued on April 1, 2008.
Features
The coprocessor has 16 64-bit registers which can be used for 32- or 64-bit integer and floating point operations and its floating point format is based on the
IEEE-754
The IEEE Standard for Floating-Point Arithmetic (IEEE 754) is a technical standard for floating-point arithmetic established in 1985 by the Institute of Electrical and Electronics Engineers (IEEE). The standard addressed many problems found in ...
standard. It has its own instruction set which performs floating point addition, subtraction, multiplication, negation, absolute value, and comparisons as well as addition, multiplication and
bit shift
In computer programming, a bitwise operation operates on a bit string, a bit array or a binary numeral (considered as a bit string) at the level of its individual bits. It is a fast and simple action, basic to the higher-level arithmetic oper ...
s on integers. It also has four 72-bit registers on which can perform a 32-bit multiply-and-accumulate instruction and a status register, as well as conversions between integer and floating point values and instructions to move data between itself and the ARM registers or memory.
It operates in parallel with the main processor, both processors receiving their instructions from a single 32-bit instruction stream. Thus, to use it efficiently, integer and floating point instructions must be interleaved so as to keep both processors busy.
Hardware bugs
Five versions of the EP93xx silicon were issued: "D0" and "D1"/"E0"/"E1" and "E2", with major revisions to the MaverickCrunch core between D0 and D1 to fix its worst bugs. All have a dozen or more hardware bugs which either give imprecise or garbage results or clobber registers or memory when certain sequences of instructions are executed in a certain order.
Compiler support
A set of
patches was submitted to the
GNU Compiler Collection
The GNU Compiler Collection (GCC) is an optimizing compiler produced by the GNU Project supporting various programming languages, hardware architectures and operating systems. The Free Software Foundation (FSF) distributes GCC as free softwar ...
by Red Hat/Cygnus Solutions in 2003 to include a code generator for it, complete with flags to work around its defects. Unfortunately these never worked well enough for it to be usable. It was removed by GCC 4.8 (Sept. 2012).
Richard Earnshaw in GCC mailing list re removal of FPA and Crunch support
/ref>
Several attempts have been made to fix this work:
* Cirrus Logic'
Crunch tools
a repackaging of GNU tools modified by Nucleusys of Bulgaria (or was it they who did the work later submitted by RedHat?)
* Th
futaris patches
for gcc 4.1.2 and 4.2.0, packaged fo
Open Embedded
* Martin Guy'
gcc-crunch patches and native compilers
a development of the futaris patches, which generate reliable code and pass all testsuites.
References
External links
* Chapter 2 of th
EP9307 Users Guide
Optimizing Code Speed for the MaverickCrunch Coprocessor
Reportedly many issues with the implementation on the chip.
* Cirrus Logic'
A detailed article on the Debian Wiki
exploring its problematic features, hardware bugs and the state of GCC support.
Patched versions of GCC capable of generating reliable MaverickCrunch code
Debian packages recompiled with MaverickCrunch acceleration
Floating point unit
Digital signal processors