Features overview

CPUs

APUs

Initial platform (2003)

Launched in 2003, the initial platform for mobile

AMD Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufactur ...

processors consists of:

Mobile Sempron

"Dublin" (Socket 754, CG, 130 nm, Desktop replacement)

'' MMX, SSE, SSE2, Enhanced 3DNow!,

NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...

"Dublin" (Socket 754, CG, 130 nm, Low power)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit''

"Georgetown" (Socket 754, D0, 90 nm, Desktop replacement)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit''

"Sonora" (Socket 754, D0, 90 nm, Low power)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit''

"Albany" (Socket 754, E6, 90 nm, Desktop replacement)

''MMX, SSE, SSE2,

SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...

, Enhanced 3DNow!, NX bit''

"Roma" (Socket 754, E6, 90 nm, Low power)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit''

Mobile Athlon 64

"ClawHammer" (C0 & CG, 130 nm, Desktop replacement)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 (AMD's

x86-64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging ...

implementation),

PowerNow! __NOTOC__ AMD PowerNow! is AMD's dynamic frequency scaling and power saving technology for laptop processors. The CPU's clock speed and VCore are automatically decreased when the computer is under low load or idle, to save battery power, reduc ...

"ClawHammer" (C0 & CG, 130 nm, 62 W TDP)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

"ClawHammer" (CG, 130 nm, 35 W TDP)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

"Odessa" (CG, 130 nm, Desktop replacement)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

"Odessa" (CG, 130 nm, 35 W TDP)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

"Oakville" (D0, 90 nm, 35 W TDP Low Power)

''MMX, SSE, SSE2, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

"Newark" (E5, 90 nm, 62 W TDP)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

Turion 64

"Lancaster" (90 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit,

AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...

, PowerNow!''

Kite platform (2006)

Introduced in 2006, the ''Kite'' platform consists of:

Mobile Sempron

"Keene" (Socket S1, F2, 90 nm, Low power)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!''

Turion 64

"Richmond" (90 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Turion 64 X2

"Taylor" (90 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

"Trinidad" (90 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Kite Refresh platform (2007)

AMD used ''Kite Refresh'' as the codenamed for the second-generation AMD mobile platform introduced in February 2007.

Mobile Sempron

"Sherman" (Socket S1, G1 & G2, 65 nm, Low power)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64''

Athlon 64 X2

"Tyler" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Turion 64 X2

"Tyler" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Puma platform (2008)

The ''Puma'' platform introduced in 2008 with June 2008 availability for the third-generation AMD mobile platform consists of:

Mobile Sempron

"Sable" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!''

Athlon X2

"Lion" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Turion X2

"Lion" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Turion X2 Ultra

"Lion" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Yukon platform (2009)

The ''Yukon'' platform was introduced on January 8, 2009 with expected April availability for the first AMD Ultrathin Platform targeting the

ultra-portable Subnotebook, also called ultraportable, superportable, or mini notebook, was a marketing term for laptop computers that are smaller and lighter than a typical notebook-sized laptop. Types and sizes As typical laptop sizes have decreased over t ...

notebook market.

Sempron

"Huron" (65 nm, Low power)

* Both models support: ''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64'' * Sempron 210U supports extra AMD-V

Athlon Neo

"Huron" (65 nm, 15 W TDP)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!, AMD-V''

"Sherman" (65 nm, 15 W TDP)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

"Congo" (65 nm, 13 W TDP)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

Turion

"Congo" (65 nm, 20 W TDP)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64 (AMD's x86-64 implementation), PowerNow!''

Congo platform (2009)

The ''Congo'' platform was introduced in September 2009, as the second AMD Ultrathin Platform targeting the

notebook market.

Athlon Neo X2

"Conesus" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, AMD-V''

Turion Neo X2

"Conesus" (65 nm)

''MMX, SSE, SSE2, SSE3, Enhanced 3DNow!, NX bit, AMD64, AMD-V, PowerNow!''

Tigris platform (2009)

The ''Tigris'' platform introduced in September 2009 for the AMD Mainstream Notebook Platform consists of:

Sempron

"Caspian" (45 nm)

Single-core mobile processor ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Athlon II

"Caspian" (45 nm)

Dual-core mobile processor ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Turion II

"Caspian" (45 nm)

Dual-core mobile processor ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Turion II (Ultra)

"Caspian" (45 nm)

Dual-core mobile processor ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V''

Nile platform (2010)

The ''Nile'' platform introduced on May 12, 2010 for the third AMD Ultrathin Platform consists of: * ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V'' * Memory support: DDR3 SDRAM,

DDR3L SDRAM Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed ...

(Up to 1066)

V series

"Geneva" (45 nm)

Single-core mobile processor

Athlon II Neo

"Geneva" (45 nm)

Single-core mobile processor Single-core mobile processor Dual-core mobile processor

Turion II Neo

"Geneva" (45 nm)

Dual-core mobile processor

Danube platform (2010)

The ''Danube'' platform introduced on May 12, 2010 for the AMD Mainstream Notebook Platform consists of: * ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V'' * Memory support: DDR3 SDRAM, DDR3L SDRAM (Up to 1066 MHz)

V series

Champlain (45 nm)

Single-core mobile processor

Athlon II

Champlain (45 nm)

Dual-core mobile processor

Turion II

Champlain (45 nm)

Dual-core mobile processor

Phenom II

* ''MMX, SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V'' * Unlike desktop models, mobile Phenom II-based models do not have L3 cache * Memory support: DDR3 SDRAM, DDR3L SDRAM (Up to 1333 MHz)

Champlain (45 nm)

Dual-core mobile processor Triple-core mobile processors Quad-core mobile processors

Brazos platform (2011)

AMD Ultrathin Platform introduced on January 5, 2011, as the fourth AMD mobile platform targeting the

notebook market. It features the 40 nm AMD Ontario (a 9-watt APU for netbooks and small form factor desktops and devices) and Zacate (an 18-watt TDP APU for ultrathin, mainstream, and value notebooks as well as desktops and all-in-ones) APUs. Both low-power APU versions feature two Bobcat x86 cores and fully support DirectX11,

DirectCompute Microsoft DirectCompute is an application programming interface (API) that supports running compute kernels on general-purpose computing on graphics processing units on Microsoft's Windows Vista, Windows 7 and later versions. DirectCompute is part ...

(

Microsoft Microsoft Corporation is an American multinational technology corporation producing computer software, consumer electronics, personal computers, and related services headquartered at the Microsoft Redmond campus located in Redmond, Washin ...

programming interface for GPU computing) and

OpenCL OpenCL (Open Computing Language) is a framework for writing programs that execute across heterogeneous platforms consisting of central processing units (CPUs), graphics processing units (GPUs), digital signal processors (DSPs), field-progra ...

(cross-platform programming interface standard for multi-core x86 and accelerated GPU computing). Both also include UVD dedicated hardware acceleration for HD video including 1080p resolutions. This platform consists of:

"''Ontario''" (40 nm)

* ''SSE, SSE2, SSE3,

SSSE3 Supplemental Streaming SIMD Extensions 3 (SSSE3 or SSE3S) is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology. History SSSE3 was first introduced with Intel processors based on the Core microarchitectu ...

, SSE4a, ABM, NX bit, AMD64, PowerNow!, AMD-V'' * Memory support: DDR3 SDRAM, DDR3L SDRAM (Single-channel, up to 1066 MHz) * 2.5 GT/s

UMI Umi or UMI may refer to: Geography * Umi, Iran, a village in Razavi Khorasan Province, Iran * Umi, Fukuoka, a town in Japan People * Umi-a-Liloa, king of the island of Hawaii *Umi Dachlan, Indonesian female artist * Umi Garrett, American female pi ...

. * Config GPU are Unified shaders :

Texture mapping unit In computer graphics, a texture mapping unit (TMU) is a component in modern graphics processing units (GPUs). They are able to rotate, resize, and distort a bitmap image to be placed onto an arbitrary plane of a given 3D model as a texture, in a ...

s :

Render output unit In computer graphics, the render output unit (ROP) or raster operations pipeline is a hardware component in modern graphics processing units (GPUs) and one of the final steps in the rendering process of modern graphics cards. The pixel pipeline ...

s * Socket FT1 (BGA-413)

"''Zacate''" (40 nm)

* ''SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, PowerNow!, AMD-V'' * Memory support: DDR3 SDRAM, DDR3L SDRAM (Single-channel, up to 1066 MHz) * 2.5 GT/s

. * Config GPU are Unified shaders : Texture mapping units : Render output units * Socket FT1 (BGA-413)

Sabine (Fusion) platform (2011)

The ''Sabine'' platform introduced on June 30, 2011 for the AMD Mainstream Notebook Platform consists of:

"''Llano''" (32 nm)

* ''SSE, SSE2, SSE3, SSE4a, ABM, Enhanced 3DNow!, NX bit, AMD64, PowerNow!, AMD-V,

Turbo Core AMD Turbo Core a.k.a. AMD Core Performance Boost (CPB) is a dynamic frequency scaling technology implemented by AMD that allows the processor to dynamically adjust and control the processor operating frequency in certain versions of its processor ...

'' * Memory support: 1.35 V

DDR3L Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth ("double data rate") interface, and has been in use since 2007. It is the higher-speed ...

-1333 memory, in addition to regular 1.5 V

DDR3 Double Data Rate 3 Synchronous Dynamic Random-Access Memory (DDR3 SDRAM) is a type of synchronous dynamic random-access memory (SDRAM) with a high bandwidth (" double data rate") interface, and has been in use since 2007. It is the higher-spee ...

memory specified (Dual-channel) * 2.5 GT/s

. * Transistors: 1.148 billion * Die size: 228 mm² ¹ Unified shaders : Texture mapping units : Render output units

Brazos 2.0 platform (2012)

AMD Ultrathin Platform introduced on June 6, 2012, as the fourth AMD mobile platform targeting the

notebook market. It will feature the 40 nm Zacate (an 18-watt TDP APU for ultrathin, mainstream, and value notebooks as well as desktops and all-in-ones) APUs. This platform consists of:

"''Ontario''", "''Zacate''" (40 nm)

* ''SSE, SSE2, SSE3, SSSE3, SSE4a, ABM, NX bit, AMD64, PowerNow!, AMD-V'' * Single-channel DDR3 SDRAM, DDR3L SDRAM * 2.5 GT/s

. * Config GPU are Unified shaders : Texture mapping units : Render output units * Socket FT1 (BGA-413)

Comal (Fusion) platform (2012)

The ''Comal'' platform introduced on May 15, 2012 for the AMD Mainstream Notebook Platform consists of:

"''Trinity''" (2012, 32 nm)

* ''MMX, SSE, SSE2, SSE3, SSSE3,

SSE4.1 SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core microarchitecture and AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vague details in a white paper; mor ...

SSE4.2 SSE4 (Streaming SIMD Extensions 4) is a SIMD CPU instruction set used in the Intel Core (microarchitecture), Core microarchitecture and AMD K10, AMD K10 (K8L). It was announced on September 27, 2006, at the Fall 2006 Intel Developer Forum, with vag ...

, SSE4a, NX bit, AMD64, AMD-V, AES,

CLMUL Carry-less Multiplication (CLMUL) is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008 and made available in the Intel Westmere processors announced in early 2010. Mathema ...

, AVX, AVX 1.1, XOP,

FMA3 The FMA instruction set is an extension to the 128 and 256-bit Streaming SIMD Extensions instructions in the x86 microprocessor instruction set to perform fused multiply–add (FMA) operations."FMA3 and FMA4 are not instruction sets, they are i ...

, FMA4, CVT16,

F16C The F16C (previously/informally known as CVT16) instruction set is an x86 instruction set architecture extension which provides support for converting between half-precision and standard IEEE single-precision floating-point formats. History T ...

'' * Memory support: 1.35 V

-1600 memory, in addition to regular 1.5 V

memory specified (Dual-channel) * 2.5 GT/s

. * Transistors: 1.303 billion * Die size: 246 mm² ¹ Config GPU are Unified shaders : Texture mapping units : Render output units

"''Richland''" (2013, 32 nm)

* ''Elite Performance APU''. * ''MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, SSE4a, NX bit, AMD64, AMD-V, AES, CLMUL, AVX, AVX 1.1, XOP,

, FMA4, CVT16,

'' * Memory support: 1.35 V

-1600 memory, in addition to regular 1.5 V

memory specified (Dual-channel) * 2.5 GT/s

. * Transistors: 1.303 billion * Die size: 246 mm² ¹ Config GPU are Unified shaders : Texture mapping units : Render output units

Jaguar (2013)

''"Temash"'' (2013, 28 nm)

Elite Mobility APU: ¹ Unified shaders : Texture mapping units : Render output units

''"Kabini"'' (2013, 28 nm)

Mainstream APU: ¹ Unified shaders : Texture mapping units : Render output units

Puma (2014)

Mullins, Tablet/2-in-1 APU

Beema, Notebook APU

Kaveri (2014)

Carrizo-L (2015)

Carrizo (2015)

Bristol Ridge (2016)

References

External links

AMD Platforms for Notebook PCs

Compare AMD Notebook Processors

Technical specification AMD products

AMD products and technologies

{{DEFAULTSORT:Amd Mobile Microprocessors

AMD Phenom Phenom is the 64-bit AMD desktop processor line based on the K10 microarchitecture, in what AMD calls family 10h (10 hex, i.e. 16 in normal decimal numbers) processors, sometimes incorrectly called "K10h". Triple-core versions (codenamed ''T ...

*Phenom