Flat memory model or linear memory model refers to a
memory addressing paradigm in which "
memory
Memory is the faculty of the mind by which data or information is encoded, stored, and retrieved when needed. It is the retention of information over time for the purpose of influencing future action. If past events could not be remembe ...
appears to the program as a single contiguous
address space." The
CPU can directly (and
linearly)
address
An address is a collection of information, presented in a mostly fixed format, used to give the location of a building, apartment, or other structure or a plot of land, generally using border, political boundaries and street names as references, ...
all of the available
memory
Memory is the faculty of the mind by which data or information is encoded, stored, and retrieved when needed. It is the retention of information over time for the purpose of influencing future action. If past events could not be remembe ...
locations without having to resort to any sort of
bank switching,
memory segmentation or
paging
In computer operating systems, memory paging is a memory management scheme that allows the physical Computer memory, memory used by a program to be non-contiguous. This also helps avoid the problem of memory fragmentation and requiring compact ...
schemes.
Memory management and
address translation can still be implemented ''on top of'' a flat memory model in order to facilitate the
operating system
An operating system (OS) is system software that manages computer hardware and software resources, and provides common daemon (computing), services for computer programs.
Time-sharing operating systems scheduler (computing), schedule tasks for ...
's functionality, resource protection,
multitasking or to increase the memory capacity beyond the limits imposed by the processor's physical address space, but the key feature of a flat memory model is that the entire memory space is linear, sequential and contiguous.
In a simple controller, or in a ''single tasking'' embedded application, where memory management is not needed nor desirable, the flat memory model is the most appropriate, because it provides the simplest interface from the programmer's point of view, with direct access to all memory locations and minimum design complexity.
In a general purpose computer system, which requires multitasking, resource allocation, and protection, the flat memory system must be augmented by some memory management scheme, which is typically implemented through a combination of dedicated hardware (inside or outside the CPU) and software built into the operating system. The flat memory model (at the physical addressing level) still provides the greatest flexibility for implementing this type of memory management.
Memory models
Most modern memory models fall into one of three categories:
Flat unpaged memory model
*Simple interface for programmers, clean design
*Greatest flexibility due to uniform access speed (segmented memory page switches usually incur varied latency due to longer accesses of other pages, either due to extra CPU logic in changing page, or hardware requirements)
*Minimum hardware and CPU real estate for simple controller applications
*Maximum execution speed, as there is no need to access auxiliary data structures such as a segment or page table in
RAM
*Not suitable for general computing or multitasking operating systems
Paged memory model
*Suitable for multitasking, general operating system design, resource protection and allocation
*Suitable for virtual memory implementation
*More CPU real estate, somewhat lower speed
*More complex to program
*Rigid page boundaries, not always the most memory efficient
*This memory model is required when using
Physical Address Extension (PAE) in
Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel and introduced on November 1, 1995. It implements the P6 (microarchitecture), P6 microarchitecture (sometimes termed i686), and was the first x86 Intel C ...
and later x86 CPUs to support 36-bit physical addresses to address more than 4GB of physical memory.
x86 segmented memory model
*Similar to paged memory, but paging is achieved by the implicit addition of two relatively shifted registers: segment:offset
*Variable page boundaries, more efficient and flexible than the paged memory model
*Quite complex and awkward from a programmer's point of view
*More difficult for compilers
*Pages can overlap / poor resource protection and isolation
*Many to one address translation correspondence: Many segment:offset combinations resolve to the same physical address
*Greater chance of programming errors
*Implemented in the original Intel 8086,
8088,
80186,
80286, and supported by
80386 and all subsequent
x86 machines through to present day
Pentium
Pentium is a series of x86 architecture-compatible microprocessors produced by Intel from 1993 to 2023. The Pentium (original), original Pentium was Intel's fifth generation processor, succeeding the i486; Pentium was Intel's flagship proce ...
and
Core 2 processors. This memory model has remained ever since in the x86 machines, which now provide multi-mode operation and rarely operate in the compatible segmented mode. See
x86 memory segmentation for details.
*saves RAM by moving the segment address, this allows short jumps that require fewer bytes.
Within the x86 architectures, when operating in the
real mode (or emulation), physical address is computed as:
General description of Real Mode
"The physical address can be calculated as Value_in_segment_register 16 + Value_in_offset_register."
:Address = 16 × segment + offset
(I.e., the 16-bit segment register is shifted left by 4 bits and added to a 16-bit offset, resulting in a 20-bit address.)
See also
* Address space
* Memory model (disambiguation)
References
{{Reflist
Computer memory