LISA (Language for Instruction Set Architectures) is a language to describe the

instruction set architecture In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ...

of a processor. LISA captures the information required to generate software tools (

compiler In computing, a compiler is a computer program that translates computer code written in one programming language (the ''source'' language) into another language (the ''target'' language). The name "compiler" is primarily used for programs that ...

, assembler, instruction set simulator, ...) and implementation hardware (in

VHDL The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple levels of abstraction, ranging from the system level down to that of logic gat ...

Verilog Verilog, standardized as IEEE 1364, is a hardware description language (HDL) used to model electronic systems. It is most commonly used in the design and verification of digital circuits at the register-transfer level of abstraction. It is a ...

) of a given processor. LISA has been used to re-implement the hardware of existing processor cores, keeping the binary compatibility with the legacy version, as all software tools did already exist and legacy compiled software images could be executed on the newly created hardware. Another application has been to generate the ISS ( instruction set simulator) for

RISC In computer engineering, a reduced instruction set computer (RISC) is a computer designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set compu ...

processors such the

ARM architecture ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configure ...

ISSes. LISA is not focused on the modeling of other on-chip components around the processor core itself, such as peripherals, hardware accelerators, buses and memories; Other languages such as SystemC can be used for these. The language has not been yet standardised by

IEEE The Institute of Electrical and Electronics Engineers (IEEE) is a 501(c)(3) professional association for electronic engineering and electrical engineering (and associated disciplines) with its corporate office in New York City and its operati ...

or ISO and is currently owned by

RWTH Aachen University RWTH Aachen University (), also known as North Rhine-Westphalia Technical University of Aachen, Rhine-Westphalia Technical University of Aachen, Technical University of Aachen, University of Aachen, or ''Rheinisch-Westfälische Technische Hoch ...

, in

Germany Germany, officially the Federal Republic of Germany (FRG),, is a country in Central Europe. It is the most populous member state of the European Union. Germany lies between the Baltic and North Sea to the north and the Alps to the sou ...

Features

History

LISA was initially developed at Institute for Integrated Signal Processing Systems (ISS) Aachen, belonging to

RWTH Aachen RWTH Aachen University (), also known as North Rhine-Westphalia Technical University of Aachen, Rhine-Westphalia Technical University of Aachen, Technical University of Aachen, University of Aachen, or ''Rheinisch-Westfälische Technische Hoch ...

University, in

. The current official version from

is LISA 2.0. The language is still in evolution to cover research on processors, including

Reconfigurable computing Reconfigurable computing is a computer architecture combining some of the flexibility of software with the high performance of hardware by processing with very flexible high speed computing fabrics like FPGA, field-programmable gate arrays (FPGA ...

(in LISA 3.0), multi-core,

parallel programming Parallel computing is a type of computation in which many calculations or processes are carried out simultaneously. Large problems can often be divided into smaller ones, which can then be solved at the same time. There are several different f ...

. One noticeable branch called LISA+ has been created for handling the modeling of peripherals such as interrupt controllers, timers, etc.

search for LISA+ Reference Language Manual

References

Papers

* V. Zivojnovic, S. Pees, Ch. Schläger, H. Meyr, ''LISA bridges gaps in high-tech languages'', Electronic Engineering Times, Oct 7, 1996

V. Zivojnovic, S. Pees, H. Meyr, ''LISA – machine description language and generic machine model for HW/SW co-design'', Proceedings of the IEEE Workshop on VLSI Signal Processing (San Francisco), Oct. 1996 * A. Chattopadhyay, H. Meyr and R. Leupers: ''LISA: A Uniform ADL for Embedded Processor Modeling, Implementation and Software Toolsuite Generation'' appearing in P. Mishra, N. Dutt, ''Processor Description Languages, Volume 1'', Morgan Kaufmann, 2008.

Books

* A. Hoffmann, H. Meyr, R. Leupers: ''Architecture Exploration for Embedded Processors with LISA'', Springer, 2010. * O. Wahlen: ''C Compiler Aided Design of Application-specific Instruction-set Processors Using the Machine Description Language LISA (Berichte Aus Der Electrotechnik)'', Shaker Verlag GmbH, Germany (August 13, 2004).

External links

LISA
project page at RWTH Aachen, Germany
Processor Designer
is a tool sold by Synopsys to create processors from LISA 2.0 descriptions {{DEFAULTSORT:Language For Instruction Set Architecture Specification languages