The Intel Paragon is a discontinued series of

massively parallel Massively parallel is the term for using a large number of computer processors (or separate computers) to simultaneously perform a set of coordinated computations in parallel. GPUs are massively parallel architecture with tens of thousands of t ...

supercomputer A supercomputer is a computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second ( FLOPS) instead of million instructions ...

s that was produced by

Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...

in the 1990s. The Paragon XP/S is a productized version of the experimental ''Touchstone Delta'' system that was built at

Caltech The California Institute of Technology (branded as Caltech or CIT)The university itself only spells its short form as "Caltech"; the institution considers other spellings such a"Cal Tech" and "CalTech" incorrect. The institute is also occasional ...

, launched in 1992. The Paragon superseded Intel's earlier iPSC/860 system, to which it is closely related. The Paragon series is based on the

Intel i860 The Intel i860 (also known as 80860) is a RISC microprocessor design introduced by Intel in 1989. It is one of Intel's first attempts at an entirely new, high-end instruction set architecture since the failed Intel iAPX 432 from the beginning of ...

RISC In computer engineering, a reduced instruction set computer (RISC) is a computer designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a complex instruction set comput ...

microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circu ...

. Up to 2048 (later, up to 4096) i860s are connected in a 2D grid. In 1993, an entry-level Paragon XP/E variant was announced with up to 32 compute nodes. The system architecture is a partitioned system, with the majority of the system comprising diskless compute nodes and a small number of I/O nodes interactive service nodes. Since the bulk of the nodes have no permanent storage, it is possible to "Red/Black switch" the compute partition from classified to unclassified by disconnecting one set of I/O nodes with classified disks and then connecting an unclassified I/O partition. Intel intended the Paragon to run the

OSF/1 OSF/1 is a variant of the Unix operating system developed by the Open Software Foundation during the late 1980s and early 1990s. OSF/1 is one of the first operating systems to have used the Mach kernel developed at Carnegie Mellon University, and ...

distributed operating system A distributed operating system is system software over a collection of independent software, networked, communicating, and physically separate computational nodes. They handle jobs which are serviced by multiple CPUs. Each individual node holds a ...

on all processors. However, this was found to be inefficient in practice, and a light-weight kernel called

SUNMOS SUNMOS (Sandia/UNM Operating System) is an operating system jointly developed by Sandia National Laboratories and the Computer Science Department at the University of New Mexico. The goal of the project, started in 1991, is to develop a highly porta ...

was developed at

Sandia National Laboratories Sandia National Laboratories (SNL), also known as Sandia, is one of three research and development laboratories of the United States Department of Energy's National Nuclear Security Administration (NNSA). Headquartered in Kirtland Air Force Ba ...

to replace OSF/1 AD on the Paragon's compute processors. Oak Ridge National Laboratory operated
Paragon XP/S 150 MP
one of the largest Paragon systems, for several years. The prototype for the Intel Paragon was the Intel Delta, built by Intel with funding from

DARPA The Defense Advanced Research Projects Agency (DARPA) is a research and development agency of the United States Department of Defense responsible for the development of emerging technologies for use by the military. Originally known as the Adv ...

and installed operationally at the

California Institute of Technology The California Institute of Technology (branded as Caltech or CIT)The university itself only spells its short form as "Caltech"; the institution considers other spellings such a"Cal Tech" and "CalTech" incorrect. The institute is also occasional ...

in the late 1980s with funding from the

National Science Foundation The National Science Foundation (NSF) is an independent agency of the United States government that supports fundamental research and education in all the non-medical fields of science and engineering. Its medical counterpart is the National I ...

. The Delta was one of the few computers to sit significantly above the curve of

Moore's Law Moore's law is the observation that the number of transistors in a dense integrated circuit (IC) doubles about every two years. Moore's law is an observation and projection of a historical trend. Rather than a law of physics, it is an empir ...

Compute nodes

Image:Paragon XP-E - GP16 top.jpg, GP16 Compute node, component side Image:Paragon XP-E - GP16 bottom.jpg, GP16 Solder side with jumpers Image:Paragon XP-E - inside.jpg, Compute nodes inside the XP/E rack Image:Paragon XP-E - bottom rack.jpg, Compute (and some I/O) nodes in XP/E rack The computer boards was produced in two variants: the GP16 with 16 MB of memory and two CPUs, and the MP16 with three CPUs. Each node has a B-NIC interface that connects to the mesh routers on the backplane. The compute nodes are diskless and performed all I/O over the mesh. During system software development, a light-pen was duct-taped to the status LED on one board and a timer interrupt was used to bit bang a

serial port In computing, a serial port is a serial communication interface through which information transfers in or out sequentially one bit at a time. This is in contrast to a parallel port, which communicates multiple bits simultaneously in parallel. ...

. The B-NIC

ASIC An application-specific integrated circuit (ASIC ) is an integrated circuit (IC) chip customized for a particular use, rather than intended for general-purpose use, such as a chip designed to run in a digital voice recorder or a high-efficien ...

is the square chip with the circular heat-sink.

I/O nodes

Image:Paragon XP-E - MP64 top.jpg, MP64 I/O node, component side Image:Paragon XP-E - MP64 side.jpg, MP64 I/O node HPPI interface Image:Paragon XP-E - top rack.jpg, Disk cabinets in XP/E rack The IO boards have either

SCSI Small Computer System Interface (SCSI, ) is a set of standards for physically connecting and transferring data between computers and peripheral devices. The SCSI standards define commands, protocols, electrical, optical and logical interface ...

drive interfaces or HiPPI network connections and are used to provide data to the compute nodes. They do not run any user applications. The MP64 I/O node has three i860 CPUs and an

i960 Intel's i960 (or 80960) was a RISC-based microprocessor design that became popular during the early 1990s as an embedded microcontroller. It became a best-selling CPU in that segment, along with the competing AMD 29000. In spite of its success, ...

CPU used in the disk controller.

References

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External Links

* * {{S-end Intel products Massively parallel computers Supercomputers Very long instruction word computing 32-bit computers