Grain 128a
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The Grain 128a stream cipher was first purposed at Symmetric Key Encryption Workshop (SKEW) in 2011 as an improvement of the predecessor Grain 128, which added security enhancements and optional message authentication using the Encrypt & MAC approach. One of the important features of the Grain family is that the throughput can be increased at the expense of additional hardware. Grain 128a is designed by Martin Ă…gren, Martin Hell, Thomas Johansson and Willi Meier.


Description of the cipher

Grain 128a consists of two large parts: Pre-output function and MAC. The pre-output function has an internal state size of 256 bits, consisting of two registers of size 128 bit:
NLFSR A nonlinear-feedback shift register (NLFSR) is a shift register whose input bit is a non-linear function of its previous state. For an n-bit shift register ''r'' its next state is defined as: r_(b_0, b_1, b_2, \ldots, b_)=r_(b_1, b_2, \ldots, f(b ...
and
LFSR In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. The most commonly used linear function of single bits is exclusive-or (XOR). Thus, an LFSR is most often a sh ...
. The MAC supports variable tag lengths w such that 0. The cipher uses a 128 bit key. The cipher supports two modes of operation: with or without authentication, which is configured via the supplied IV_0 such that if IV_0=1 then authentication of the message is enabled, and if IV_0=0 authentication of the message is disabled.


Pre-output function

The pre-output function consists of two registers of size 128 bit:
NLFSR A nonlinear-feedback shift register (NLFSR) is a shift register whose input bit is a non-linear function of its previous state. For an n-bit shift register ''r'' its next state is defined as: r_(b_0, b_1, b_2, \ldots, b_)=r_(b_1, b_2, \ldots, f(b ...
(b) and
LFSR In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. The most commonly used linear function of single bits is exclusive-or (XOR). Thus, an LFSR is most often a sh ...
(s) along with 2 feedback polynomials f and g and a boolean function h. f(x)=1+x^+x^+x^+x^+x^+x^ g(x)=1+x^+x^+x^+x^+x^+x^x^+x^x^+x^x^x^x^+x^x^+x^x^+x^x^+x^x^x^+x^x^x^+x^x^x^x^ h(x)=b_s_+s_s_+b_s_+s_s_+b_b_s_ In addition to the feedback polynomials, the update functions for the
NLFSR A nonlinear-feedback shift register (NLFSR) is a shift register whose input bit is a non-linear function of its previous state. For an n-bit shift register ''r'' its next state is defined as: r_(b_0, b_1, b_2, \ldots, b_)=r_(b_1, b_2, \ldots, f(b ...
and the
LFSR In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. The most commonly used linear function of single bits is exclusive-or (XOR). Thus, an LFSR is most often a sh ...
are: b_=s_i+b_+b_+b_+b_+b_+b_b_+b_b_+b_b_+b_b_+b_b_+b_b_+b_b_+b_b_b_b_+b_b_b_+b_b_b_ s_=s_i+s_+s_+s_+s_+s_ The pre-output stream (y) is defined as: y_i=h(x)+s_+b_+b_+b_+b_+b_+b_+b_


Initialisation

Upon initialisation we define an IV of 96 bit, where the IV_0 dictates the mode of operation. The
LFSR In computing, a linear-feedback shift register (LFSR) is a shift register whose input bit is a linear function of its previous state. The most commonly used linear function of single bits is exclusive-or (XOR). Thus, an LFSR is most often a sh ...
is initialised as: s_i = IV_i for 0 \leq i \leq 95 s_i = 1 for 96 \leq i \leq 126 s_ = 0 The last 0 bit ensures that similar key-IV pairs ''do not'' produce shifted versions of each other. The
NLFSR A nonlinear-feedback shift register (NLFSR) is a shift register whose input bit is a non-linear function of its previous state. For an n-bit shift register ''r'' its next state is defined as: r_(b_0, b_1, b_2, \ldots, b_)=r_(b_1, b_2, \ldots, f(b ...
is initialised by copying the entire 128 bit key (k) into the
NLFSR A nonlinear-feedback shift register (NLFSR) is a shift register whose input bit is a non-linear function of its previous state. For an n-bit shift register ''r'' its next state is defined as: r_(b_0, b_1, b_2, \ldots, b_)=r_(b_1, b_2, \ldots, f(b ...
: b_i = k_i for 0 \leq i \leq 127


Start up clocking

Before the pre-output function can begin to output its pre-output stream it has to be clocked 256 times to warm up, during this stage the pre-output stream is fed into the feedback polynomials g and f.


Key stream

The key stream (z) and MAC functionality in Grain 128a both share the same pre-output stream (y). As authentication is optional our key stream definition depends upon the IV_0. When authentication is enabled, the MAC functionality uses the first 2w bits (where w is the tag size) after the start up clocking to initialise. The key stream is then assigned every other bit due to the shared pre-output stream. If authentication is enabled: z_i = y_ If authentication is disabled: z_i = y_i


MAC

Grain 128a supports tags of size w up to 32 bit, to do this 2 registers of size w is used, a shift register(r) and an accumulator(a). To create a tag of a message m where L is the length of m+1 as we have to set m_L = 1 to ensure that i.e. m1 = 1 and m2 = 10 has different tags, and also making it impossible to generate a tag that completely ignores the input from the shift register after initialisation. For each bit 0 \leq j \leq 31 in the accumulator we at time 0 \leq i \leq L we denounce a bit in the accumulator as a_^.


Initialisation

When authentication is enabled Grain 128a uses the first 2w bits of the pre-output stream(y) to initialise the shift register and the accumulator. This is done by: Shift register: r_i = y_ for 0\leq i \leq 31 Accumulator: a_0^j = y_j for 0 \leq j \leq 31


Tag generation

Shift register: The shift register is fed all the odd bits of the pre-output stream(y): r_ = y_ Accumulator: a_^j = a_i^j + m_i r_ for 0 \leq i \leq L


Final tag

When the cipher has completed the L iterations the final tag(t) is the content of the accumulator: t_i = a_^i for 0 \leq i \leq 31


References


External links


A New Version of Grain-128 with Authentication
{{DEFAULTSORT:Grain 128a