The FLAGS
register
Register or registration may refer to:
Arts entertainment, and media Music
* Register (music), the relative "height" or range of a note, melody, part, instrument, etc.
* ''Register'', a 2017 album by Travis Miller
* Registration (organ), th ...
is the
status register
A status register, flag register, or condition code register (CCR) is a collection of status Flag (computing), flag bits for a Central processing unit, processor. Examples of such registers include FLAGS register (computing), FLAGS register in the ...
that contains the current state of a x86
CPU. The size and meanings of the flag bits are architecture dependent. It usually reflects the result of arithmetic operations as well as information about restrictions placed on the CPU operation at the current time. Some of those restrictions may include preventing some interrupts from triggering, prohibition of execution of a class of "privileged" instructions. Additional status flags may bypass memory mapping and define what action the CPU should take on arithmetic overflow.
The carry, parity, adjust, zero and sign flags are included in many architectures. The adjust flag used to be called auxiliary carry bit in 8080 and half-carry bit in the
Zilog Z80
The Z80 is an 8-bit microprocessor introduced by Zilog as the startup company's first product. The Z80 was conceived by Federico Faggin in late 1974 and developed by him and his 11 employees starting in early 1975. The first working samples wer ...
architecture.
In the
i286
The Intel 80286 (also marketed as the iAPX 286 and often called Intel 286) is a 16-bit microprocessor that was introduced on February 1, 1982. It was the first 8086-based CPU with separate, non-multiplexed address and data buses and also the fi ...
architecture, the register is
16 bits wide. Its successors, the EFLAGS and RFLAGS registers, are
32 bits and
64 bits wide, respectively. The wider registers retain compatibility with their smaller predecessors.
FLAGS
Note: The mask column in the table is the AND
bitmask
In computer science, a mask or bitmask is data that is used for bitwise operations, particularly in a bit field. Using a mask, multiple bits in a byte, nibble, word, etc. can be set either on or off, or inverted from on to off (or vice versa) in ...
(as
hexadecimal
In mathematics and computing, the hexadecimal (also base-16 or simply hex) numeral system is a positional numeral system that represents numbers using a radix (base) of 16. Unlike the decimal system representing numbers using 10 symbols, hexa ...
value) to query the flag(s) within FLAGS register value.
Usage
All FLAGS registers contain the
condition codes, flag bits that let the results of one
machine-language instruction affect another instruction. Arithmetic and logical instructions set some or all of the flags, and conditional jump instructions take variable action based on the value of certain flags. For example,
jz
(Jump if Zero),
jc
(Jump if Carry), and
jo
(Jump if Overflow) depend on specific flags. Other conditional jumps test combinations of several flags.
FLAGS registers can be moved from or to the stack. This is part of the job of saving and restoring CPU context, against a routine such as an interrupt service routine whose changes to registers should not be seen by the calling code. Here are the relevant instructions:
*The PUSHF and POPF instructions transfer the 16-bit FLAGS register.
*PUSHFD/POPFD (introduced with the
i386
The Intel 386, originally released as 80386 and later renamed i386, is a 32-bit microprocessor introduced in 1985. The first versions had 275,000 transistors[x64
x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging mo ...]
architecture) transfer the 64-bit quadword register RFLAGS.
In 64-bit mode, PUSHF/POPF and PUSHFQ/POPFQ are available but PUSHFD/POPFD are not.
The lower 8 bits of the FLAGS register is also open to direct load/store manipulation by SAHF and LAHF (load/store AH into flags).
Example
The ability to push and pop FLAGS registers lets a program manipulate information in the FLAGS in ways for which machine-language instructions do not exist. For example, the
cld
and
std
instructions clear and set the direction flag (DF), respectively; but there is no instruction to complement DF. This can be achieved with the following
assembly code
In computer programming, assembly language (or assembler language, or symbolic machine code), often referred to simply as Assembly and commonly abbreviated as ASM or asm, is any low-level programming language with a very strong correspondence be ...
:
pushf ; Use the stack to transfer the FLAGS
pop ax ; ...into the AX register
push ax ; and copy them back onto the stack for storage
xor ax, 400h ; Toggle (complement) DF only; other bits are unchanged
push ax ; Use the stack again to move the modified value
popf ; ...into the FLAGS register
; Insert here the code that required the DF flag to be complemented
popf ; Restore the original value of the FLAGS
By manipulating the FLAGS register, a program can determine the model of the installed processor. For example, the alignment flag can only be changed on the
486 and above. If the program tries to modify this flag and senses that the modification did not persist, the processor is earlier than the 486.
Starting with the
Intel Pentium
Pentium is a brand used for a series of x86 architecture-compatible microprocessors produced by Intel. The original Pentium processor from which the brand took its name was first released on March 22, 1993. After that, the Pentium II and P ...
, the
CPUID
In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from CPU IDentification) allowing software to discover details of the processor. It was introduced by Intel i ...
instruction reports the processor model. However, the above method remains useful to distinguish between earlier models.
See also
*
Bit field
A bit field is a data structure that consists of one or more adjacent bits which have been allocated for specific purposes, so that any single bit or group of bits within the structure can be set or inspected. A bit field is most commonly used to r ...
*
Control register
A control register is a processor register which changes or controls the general behavior of a CPU or other digital device. Common tasks performed by control registers include interrupt control, switching the addressing mode, paging control, a ...
*
CPU flag (x86)
*
Program status word
The program status word (PSW) is a register that performs the function of a status register and program counter, and sometimes more. The term is also applied to a copy of the PSW in storage. This article only discusses the PSW in the IBM System/3 ...
*
Status register
A status register, flag register, or condition code register (CCR) is a collection of status Flag (computing), flag bits for a Central processing unit, processor. Examples of such registers include FLAGS register (computing), FLAGS register in the ...
*
x86 assembly language
x86 assembly language is the name for the family of assembly languages which provide some level of backward compatibility with CPUs back to the Intel 8008 microprocessor, which was launched in April 1972. It is used to produce object code for t ...
*
x86 instruction listings
The x86 instruction set refers to the set of instructions that x86-compatible microprocessors support. The instructions are usually part of an executable program, often stored as a computer file and executed on the processor.
The x86 instruction ...
References
{{Reflist
Digital registers
X86 architecture