Tolapai is the code name of

Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...

's embedded system on a chip (SoC) which combines a

Pentium M The Pentium M is a family of mobile 32-bit single-core x86 microprocessors (with the modified Intel P6 microarchitecture) introduced in March 2003 and forming a part of the Intel Carmel notebook platform under the then new Centrino brand. The ...

(

Dothan Dothan is a place-name from the Hebrew Bible, identified with Tel Dothan. It may refer to: * Dothan, Alabama, a city in Dale, Henry, and Houston counties in the U.S. state of Alabama * Dani Dothan, lyricist and vocalist for the Israeli rock and ne ...

) processor core, DDR2 memory controllers and

input/output In computing, input/output (I/O, or informally io or IO) is the communication between an information processing system, such as a computer, and the outside world, possibly a human or another information processing system. Inputs are the signals ...

(I/O) controllers, and a ''QuickAssist'' integrated accelerator unit for security functions.

Overview

The Tolapai

embedded processor An embedded system is a computer system—a combination of a computer processor, computer memory, and input/output peripheral devices—that has a dedicated function within a larger mechanical or electronic system. It is ''embedded'' ...

has 148 million transistors on a

90 nm The 90 nm process refers to the level of MOSFET (CMOS) fabrication process technology that was commercialized by the 2003–2005 timeframe, by leading semiconductor companies like Toshiba, Sony, Samsung, IBM, Intel, Fujitsu, TSMC, El ...

process technology A process is a series or set of activities that interact to produce a result; it may occur once-only or be recurrent or periodic. Things called a process include: Business and management *Business process, activities that produce a specific se ...

, 1088-ball FCBGA with a 1.092mm pitch, and comes in a 37.5mm × 37.5mm package. It is also Intel's first integrated x86 processor, chipset and memory controller since 1994's 80386EX.Intel confirms details of Tolapai, a SoC embedded processor
Ars Technica, August 30, 2007 Intel EP80579 integrated processor for embedded computing: * CPU:

clocked from between 600 MHz and 1.2 GHz * Cache: 256 KB * Package: 1088-ball flip chip BGA * Memory: DDR2 from 400- to 800 MHz; MCH supports DIMM or memory down with optional 32-/64-bit and ECC configurations * Bus: One local expansion bus for general control or expanded peripheral connections * PCI Express: PCIe root complex interface in 1 ×8, 2 ×4, or 2 ×1 configurations * Storage: 2× SATA (Gen1 or Gen2) interfaces * Networking: 3× 10/100/1000 Ethernet MACs supporting ''reduced gigabit media-independent interface'' (

RGMII The media-independent interface (MII) was originally defined as a standard interface to connect a Fast Ethernet (i.e., ) media access control (MAC) block to a PHY chip. The MII is standardized by IEEE 802.3u and connects different types of PHYs ...

) or ''reduced media-independent interface'' (

RMII The media-independent interface (MII) was originally defined as a standard interface to connect a Fast Ethernet (i.e., ) media access control (MAC) block to a PHY chip. The MII is standardized by IEEE 802.3u and connects different types of PHYs ...

), and Management Data Input/Output (MDIO) * USB: 2×

Universal Serial Bus Universal Serial Bus (USB) is an industry standard that establishes specifications for cables, connectors and protocols for connection, communication and power supply (interfacing) between computers, peripherals and other computers. A broad ...

(1.1 or 2.0) interfaces * GPIO: 36×

General Purpose Input/Output A general-purpose input/output (GPIO) is an uncommitted digital signal pin on an integrated circuit or electronic circuit (e.g. MCUs/ MPUs ) board which may be used as an input or output, or both, and is controllable by software. GPIOs have no ...

ports * CAN: 2× Controller Area Network (

CAN bus A Controller Area Network (CAN bus) is a robust vehicle bus standard designed to allow microcontrollers and devices to communicate with each other's applications without a host computer. It is a message-based protocol, designed originally for mu ...

) 2.0b interfaces * High Speed Serial (HSS): 3× ports for T1/E1 or FXS/FXO connections * Serial: 1×

Synchronous Serial Port A Synchronous Serial Port (SSP) is a controller that supports the Serial Peripheral Interface (SPI), 4-wire Synchronous Serial Interface (SSI), and Microwire serial buses. A SSP uses a master-slave paradigm to communicate across its connected bus. ...

(SSP) *

Universal asynchronous receiver-transmitter A universal asynchronous receiver-transmitter (UART ) is a computer hardware device for asynchronous serial communication in which the data format and transmission speeds are configurable. It sends data bits one by one, from the least significa ...

s (UARTs): 2×

16550 UART The 16550 UART ( universal asynchronous receiver/transmitter) is an integrated circuit designed for implementing the interface for serial communications. The corrected -A version was released in 1987 by National Semiconductor. It is frequent ...

-compatible * SMB: 2× System Management Bus (SMBus) interfaces * LPC: 1×

Low Pin Count The Low Pin Count (LPC) bus is a computer bus used on IBM-compatible personal computers to connect low-bandwidth devices to the CPU, such as the BIOS ROM (BIOS ROM was moved to the Serial Peripheral Interface (SPI) bus in 2006), "legacy" I/O d ...

(LPC 1.1) interface * SPI: 1×

Serial Peripheral Interface Bus The Serial Peripheral Interface (SPI) is a synchronous serial communication interface specification used for short-distance communication, primarily in embedded systems. The interface was developed by Motorola in the mid-1980s and has become a ...

(SPI) boot interface * RTC: Integrated

real-time clock A real-time clock (RTC) is an electronic device (most often in the form of an integrated circuit) that measures the passage of time. Although the term often refers to the devices in personal computers, servers and embedded systems, RTCs are pr ...

(RTC) support * EDMA: Enhanced DMA (EDMA) engine with low latency memory transfers; supports multiple peer-to-peer configurations * Operating temperature: 0 to 70 degrees C (most models); −40 to 85 degrees C (some models)

List of Intel 80579 processors

* All models support: '' MMX, Streaming SIMD Extensions (SSE), SSE2,

SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...

XD bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit is ...

(an

NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...

implementation)'' * Die size: 225 mm² * Steppings: B1

References

External links

Intel Introduces Future VPN Solution: Tolapai

* ttp://www.news.com/8301-10784_3-9763743-7.html Cnet News: Live from Hot Chips 19: Session 7, Networking
Intel QuickAssist Acceleration Technology for Embedded Systems

{{Intel processors, p6 Intel products Intel x86 microprocessors

Overview

List of Intel 80579 processors

See also

References

External links