A digital clock manager (DCM) is an electronic component available on some field-programmable gate arrays (FPGAs) (notably ones produced by
Xilinx
Xilinx, Inc. ( ) was an American technology and semiconductor company that primarily supplied programmable logic devices. The company is renowned for inventing the first commercially viable field-programmable gate array (FPGA). It also pioneered ...
). A digital clock manager is useful for manipulating
clock signal
In electronics and especially synchronous digital circuits, a clock signal (historically also known as ''logic beat'') is an electronic logic signal (voltage or current) which oscillates between a high and a low state at a constant frequency and ...
s inside the FPGA, and to avoid
clock skew
Clock skew (sometimes called timing skew) is a phenomenon in synchronous digital circuit systems (such as computer systems) in which the same sourced clock signal arrives at different components at different times due to gate or, in more advanc ...
which would introduce errors in the circuit.
Uses
Digital clock managers have the following applications:
[ xilinx.com]
* Multiplying or dividing an incoming clock (which can come from outside the FPGA or from a Digital Frequency Synthesizer
FS.
* Making sure the clock has a steady
duty cycle
A duty cycle or power cycle is the fraction of one period in which a signal or system is active. Duty cycle is commonly expressed as a percentage or a ratio. A period is the time it takes for a signal to complete an on-and-off cycle. As a for ...
.
* Adding a
phase shift
In physics and mathematics, the phase (symbol φ or ϕ) of a wave or other periodic function F of some real variable t (such as time) is an angle-like quantity representing the fraction of the cycle covered up to t. It is expressed in such a s ...
with the additional use of a
delay-locked loop.
* Eliminating clock skew within an FPGA design.
See also
*
Phase-locked loop
A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is fixed relative to the phase of an input signal. Keeping the input and output phase in lockstep also implies keeping the input and ou ...
References
Gate arrays
Electronic oscillators
Integrated circuits
Digital electronics
Electronic design
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