HOME

TheInfoList



OR:

Cyclops64 (formerly known as
Blue Gene Blue Gene was an IBM project aimed at designing supercomputers that can reach operating speeds in the petaFLOPS (PFLOPS) range, with relatively low power consumption. The project created three generations of supercomputers, Blue Gene/L, Blue ...
/C) is a
cellular architecture Cellular architecture is a type of computer architecture prominent in parallel computing. IBM's Cell microprocessor was the first cellular architecture to reach the market. Cellular architecture takes Multi-core (computing), multi-core archite ...
in development by
IBM International Business Machines Corporation (using the trademark IBM), nicknamed Big Blue, is an American Multinational corporation, multinational technology company headquartered in Armonk, New York, and present in over 175 countries. It is ...
. The Cyclops64 project aims to create the first "
supercomputer A supercomputer is a type of computer with a high level of performance as compared to a general-purpose computer. The performance of a supercomputer is commonly measured in floating-point operations per second (FLOPS) instead of million instruc ...
on a chip".


History

Cyclops64 is part of the
Blue Gene Blue Gene was an IBM project aimed at designing supercomputers that can reach operating speeds in the petaFLOPS (PFLOPS) range, with relatively low power consumption. The project created three generations of supercomputers, Blue Gene/L, Blue ...
effort, to produce the next several generations of supercomputers. The projects were started in response to the announced construction of the Earth Simulator. Cyclops64 is a cooperative project between the
United States Department of Energy The United States Department of Energy (DOE) is an executive department of the U.S. federal government that oversees U.S. national energy policy and energy production, the research and development of nuclear power, the military's nuclear w ...
(which is partially funding the project), the
U.S. Department of Defense The United States Department of Defense (DoD, USDOD, or DOD) is an executive department of the U.S. federal government charged with coordinating and supervising the six U.S. armed services: the Army, Navy, Marines, Air Force, Space Force, t ...
, industry (
IBM International Business Machines Corporation (using the trademark IBM), nicknamed Big Blue, is an American Multinational corporation, multinational technology company headquartered in Armonk, New York, and present in over 175 countries. It is ...
in particular), and
academia An academy (Attic Greek: Ἀκαδήμεια; Koine Greek Ἀκαδημία) is an institution of tertiary education. The name traces back to Plato's school of philosophy, founded approximately 386 BC at Akademia, a sanctuary of Athena, the go ...
. The architecture was conceived by Seymour Cray Award winner Monty Denneau, who is currently leading the project.


Architecture overview

Each
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit central processing units (CPU) and arithmetic logic units (ALU) are those that are based on processor registers, a ...
Cyclops64 chip (processor) will run at 500
megahertz The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), often described as being equivalent to one event (or cycle) per second. The hertz is an SI derived unit whose formal expression in terms of SI base ...
and contain 80 processors. Each processor will have two thread units and a
floating point unit A floating-point unit (FPU), numeric processing unit (NPU), colloquially math coprocessor, is a part of a computer system specially designed to carry out operations on floating-point numbers. Typical operations are addition, subtraction, multipli ...
. A thread unit is an in-order
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit central processing units (CPU) and arithmetic logic units (ALU) are those that are based on processor registers, a ...
RISC In electronics and computer science, a reduced instruction set computer (RISC) is a computer architecture designed to simplify the individual instructions given to the computer to accomplish tasks. Compared to the instructions given to a comp ...
core with 32 kB scratch pad memory, using a 60-instruction subset of the
Power ISA Power ISA is a reduced instruction set computer (RISC) instruction set architecture (ISA) currently developed by the OpenPOWER Foundation, led by IBM. It was originally developed by IBM and the now-defunct Power.org industry group. Power IS ...
instruction set In computer science, an instruction set architecture (ISA) is an abstract model that generally defines how software controls the CPU in a computer or a family of computers. A device or program that executes instructions described by that ISA, s ...
. Five processors share a 32 kB instruction cache. The processors will be connected with a 96 port, 7 stage non-internally blocking
crossbar switch In electronics and telecommunications, a crossbar switch (cross-point switch, matrix switch) is a collection of switches arranged in a Matrix (mathematics), matrix configuration. A crossbar switch has multiple input and output lines that form a ...
. They will communicate with each other via global interleaved memory (memory that can be written to and read by all threads) in the SRAM. The theoretical peak performance of a Cyclops64 chip is 80 gigaflops (this assumes a continuous stream of multiply–accumulate instructions, each of which are counted as two floating-point operations). A full system (consisting of 2 thread units per processor, 80 processors per chip, 1 chip per board, 48 boards per midplane, 3 midplanes per rack, and 96 (12 x 8) racks per system) would contain 13,824 C64 chips, consisting of 1,105,920 processors capable of running 2,211,840 concurrent threads.


Software

Cyclops64 exposes much of the underlying hardware to the programmer, allowing the programmer to write very high performance, finely tuned software. One negative consequence is that efficiently programming Cyclops64 is difficult. {{Citation needed, date=August 2009 The system is expected to support TiNy-Threads (a threading library developed at the
University of Delaware The University of Delaware (colloquially known as UD, UDel, or Delaware) is a Statutory college#Delaware, privately governed, state-assisted Land-grant university, land-grant research university in Newark, Delaware, United States. UD offers f ...
) and
POSIX Threads In computing, POSIX Threads, commonly known as pthreads, is an execution model that exists independently from a programming language, as well as a parallel execution model. It allows a program to control multiple different flows of work that ov ...
.


Design and fabrication

Verification testing and system software development is being done at the
University of Delaware The University of Delaware (colloquially known as UD, UDel, or Delaware) is a Statutory college#Delaware, privately governed, state-assisted Land-grant university, land-grant research university in Newark, Delaware, United States. UD offers f ...
.


External links


Technical description of the Cyclops64 architecture and system software
(
Gzip gzip is a file format and a software application used for file compression and decompression. The program was created by Jean-loup Gailly and Mark Adler as a free software replacement for the compress program used in early Unix systems, and ...
ped
PostScript PostScript (PS) is a page description language and dynamically typed, stack-based programming language. It is most commonly used in the electronic publishing and desktop publishing realm, but as a Turing complete programming language, it c ...
file) *
Overviev of the architecture
*
A Detailed Analysis of the Architecture
IBM microprocessors