In
computer architecture
In computer engineering, computer architecture is a description of the structure of a computer system made from component parts. It can sometimes be a high-level description that ignores details of the implementation. At a more detailed level, t ...
, cycles per instruction (aka clock cycles per instruction, clocks per instruction, or CPI) is one aspect of a
processor
Processor may refer to:
Computing Hardware
* Processor (computing)
**Central processing unit (CPU), the hardware within a computer that executes a program
*** Microprocessor, a central processing unit contained on a single integrated circuit (I ...
's performance: the average number of
clock cycle
In electronics and especially synchronous digital circuits, a clock signal (historically also known as ''logic beat'') oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.
A clock sign ...
s per
instruction for a program or program fragment. It is the
multiplicative inverse
In mathematics, a multiplicative inverse or reciprocal for a number ''x'', denoted by 1/''x'' or ''x''−1, is a number which when Multiplication, multiplied by ''x'' yields the multiplicative identity, 1. The multiplicative inverse of a rat ...
of
instructions per cycle
In computer architecture, instructions per cycle (IPC), commonly called instructions per clock is one aspect of a processor's performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse of cycl ...
.
Definition
The average of Cycles Per Instruction in a given process is defined by the following:
Where
is the number of instructions for a given instruction type
,
is the clock-cycles for that instruction type and
is the total instruction count. The summation sums over all instruction types for a given benchmarking process.
Explanation
Let us assume a
classic RISC pipeline
In the history of computing hardware, history of computer hardware, some early reduced instruction set computer central processing units (RISC CPUs) used a very similar architectural solution, now called a classic RISC pipeline. Those CPUs were: ...
, with the following five stages:
# Instruction fetch cycle (IF).
# Instruction decode/Register fetch cycle (ID).
# Execution/Effective address cycle (EX).
# Memory access (MEM).
# Write-back cycle (WB).
Each stage requires one clock cycle and an instruction passes through the stages sequentially. Without
pipelining, in a
multi-cycle processor
A multi-cycle processor is a processor that carries out one instruction over multiple clock cycles
In electronics and especially synchronous digital circuits, a clock signal (historically also known as ''logic beat'') oscillates between a high and ...
, a new instruction is fetched in stage 1 only after the previous instruction finishes at stage 5, therefore the number of clock cycles it takes to execute an instruction is five (CPI = 5 > 1). In this case, the processor is said to be ''subscalar''. With pipelining, a new instruction is fetched every clock cycle by exploiting
instruction-level parallelism
Instruction-level parallelism (ILP) is the parallel or simultaneous execution of a sequence of instructions in a computer program. More specifically ILP refers to the average number of instructions run per step of this parallel execution.
Discu ...
, therefore, since one could theoretically have five instructions in the five pipeline stages at once (one instruction per stage), a different instruction would complete stage 5 in every clock cycle and on average the number of clock cycles it takes to execute an instruction is 1 (CPI = 1). In this case, the processor is said to be ''scalar''.
With a single-
execution-unit processor, the best CPI attainable is 1. However, with a multiple-execution-unit processor, one may achieve even better CPI values (CPI < 1). In this case, the processor is said to be ''
superscalar
A superscalar processor is a CPU that implements a form of parallelism called instruction-level parallelism within a single processor. In contrast to a scalar processor, which can execute at most one single instruction per clock cycle, a sup ...
''. To get better CPI values without pipelining, the number of execution units must be greater than the number of stages. For example, with six executions units, six new instructions are fetched in stage 1 only after the six previous instructions finish at stage 5, therefore on average the number of clock cycles it takes to execute an instruction is 5/6 (CPI = 5/6 < 1). To get better CPI values with pipelining, there must be at least two execution units. For example, with two executions units, two new instructions are fetched every clock cycle by exploiting instruction-level parallelism, therefore two different instructions would complete stage 5 in every clock cycle and on average the number of clock cycles it takes to execute an instruction is 1/2 (CPI = 1/2 < 01).
Examples
Example 1
For the multi-cycle
MIPS, there are five types of instructions:
* Load (5 cycles)
* Store (4 cycles)
*
R-type
is a horizontally scrolling shooter arcade video game developed and released by Irem in 1987 and the first game in the ''R-Type'' series. The player controls a star ship, the R-9 "Arrowhead", in its efforts to destroy the Bydo, a powerful a ...
(4 cycles)
*
Branch
A branch, sometimes called a ramus in botany, is a woody structural member connected to the central trunk (botany), trunk of a tree (or sometimes a shrub). Large branches are known as boughs and small branches are known as twigs. The term '' ...
(3 cycles)
*
Jump
Jumping is a form of locomotion or movement in which an organism or non-living (e.g., robotic) mechanical system propels itself through the air along a ballistic trajectory.
Jump or Jumping also may refer to:
Places
* Jump, Kentucky or Jump S ...
(3 cycles)
If a program has:
* 50% load instructions
* 25% store instructions
* 15% R-type instructions
* 8% branch instructions
* 2% jump instructions
then, the CPI is:
Example 2
[Advanced Computer Architecture by Kai Hwang, Chapter 1, Exercise Problem 1.1] A 400
MHz
The hertz (symbol: Hz) is the unit of frequency in the International System of Units (SI), equivalent to one event (or cycle) per second. The hertz is an SI derived unit whose expression in terms of SI base units is s−1, meaning that one he ...
processor was used to execute a
benchmark program
In computing, a benchmark is the act of running a computer program, a set of programs, or other operations, in order to assess the relative performance of an object, normally by running a number of standard tests and trials against it.
The ter ...
with the following
instruction mix
Instruction or instructions may refer to:
Computing
* Instruction, one operation of a processor within a computer architecture instruction set
* Computer program, a collection of instructions
Music
* Instruction (band), a 2002 rock band from New ...
and
clock cycle
In electronics and especially synchronous digital circuits, a clock signal (historically also known as ''logic beat'') oscillates between a high and a low state and is used like a metronome to coordinate actions of digital circuits.
A clock sign ...
count:
Determine the effective CPI,
MIPS (Millions of instructions per second) rate, and execution time for this program.
since:
and
Therefore:
See also
*
Cycle per second
The cycle per second is a once-common English name for the unit of frequency now known as the hertz (Hz). The plural form was typically used, often written cycles per second, cycles/second, c.p.s., c/s, or, ambiguously, just cycles (Cy./Cyc.). The ...
(
Hz)
*
Instructions per cycle
In computer architecture, instructions per cycle (IPC), commonly called instructions per clock is one aspect of a processor's performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse of cycl ...
(IPC)
*
Instructions per second
Instructions per second (IPS) is a measure of a computer's processor speed. For complex instruction set computers (CISCs), different instructions take different amounts of time, so the value measured depends on the instruction mix; even for compa ...
(IPS)
*
Megahertz myth
The megahertz myth, or in more recent cases the gigahertz myth, refers to the misconception of only using clock rate (for example measured in megahertz or gigahertz) to compare the performance of different microprocessors. While clock rates are a ...
*
MIPS
* The
benchmark
Benchmark may refer to:
Business and economics
* Benchmarking, evaluating performance within organizations
* Benchmark price
* Benchmark (crude oil), oil-specific practices
Science and technology
* Benchmark (surveying), a point of known elevatio ...
article provides a useful introduction to computer performance measurement for those readers interested in the topic.
References
{{DEFAULTSORT:Cycles Per Instruction
Instruction processing
Clock signal
Rates
Computer performance