The ARM Cortex-A72 is a
central processing unit
A central processing unit (CPU), also called a central processor, main processor or just Processor (computing), processor, is the electronic circuitry that executes Instruction (computing), instructions comprising a computer program. The CPU per ...
implementing the
ARMv8-A
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configured ...
64-bit
instruction set designed by
ARM Holdings'
Austin design centre. The Cortex-A72 is a 3-way decode
out-of-order superscalar pipeline.
It is available as
SIP core to licensees, and its design makes it suitable for integration with other SIP cores (e.g.
GPU
A graphics processing unit (GPU) is a specialized electronic circuit designed to manipulate and alter memory to accelerate the creation of images in a frame buffer intended for output to a display device. GPUs are used in embedded systems, mobi ...
,
display controller
A video display controller or VDC (also called a display engine or display interface) is an integrated circuit which is the main component in a video-signal generator, a device responsible for the production of a TV video signal in a computing ...
,
DSP
DSP may refer to:
Computing
* Digital signal processing, the mathematical manipulation of an information signal
* Digital signal processor, a microprocessor designed for digital signal processing
* Yamaha DSP-1, a proprietary digital signal ...
,
image processor
An image processor, also known as an image processing engine, image processing unit (IPU), or image signal processor (ISP), is a type of media processor or specialized digital signal processor (DSP) used for image processing, in digital cameras ...
, etc.) into one
die constituting a
system on a chip (SoC). The Cortex-A72 was announced in 2015 to serve as the successor of the
Cortex-A57
The ARM Cortex-A57 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings. The Cortex-A57 is an out-of-order superscalar pipeline. It is available as SIP core to licensees, and its design makes ...
, and was designed to use 20% less power or offer 90% greater performance.
Overview
* Pipelined processor with deeply
out-of-order,
speculative issue 3-way
superscalar execution pipeline
* DSP and
NEON SIMD
Single instruction, multiple data (SIMD) is a type of parallel processing in Flynn's taxonomy. SIMD can be internal (part of the hardware design) and it can be directly accessible through an instruction set architecture (ISA), but it shoul ...
extensions are mandatory per core
*
VFPv4 Floating Point Unit onboard (per core)
*
Hardware virtualization
Hardware virtualization is the virtualization of computers as complete hardware platforms, certain logical abstractions of their componentry, or only the functionality required to run various operating systems. Virtualization hides the physica ...
support
*
Thumb-2
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configure ...
instruction set encoding reduces the size of 32-bit programs with little impact on performance.
*
TrustZone
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configure ...
security extensions
* Program Trace Macrocell and CoreSight Design Kit for unobtrusive tracing of instruction execution
* 32 KiB data (2-way set-associative) + 48 KiB instruction (3-way set-associative) L1 cache per core
* Integrated low-latency level-2 (16-way set-associative) cache controller, 512 KB to 4 MB configurable size per cluster
* 48-entry fully associative L1 instruction translation lookaside buffer (TLB) with native support for 4 KiB, 64 KiB, and 1 MB page sizes
* 32-entry fully associative L1 data TLB with native support for 4 KiB, 64 KiB, and 1 MB page sizes
** 4-way set-associative of 1024-entry unified L2 TLB per core, supports hit-under-miss
* Sophisticated branch prediction algorithm that significantly increases performance and reduces energy from misprediction and speculation
* Early IC tag –3-way L1 cache at direct-mapped power*
* Regionalized TLB and μBTB tagging
* Small-offset branch-target optimizations
* Suppression of superfluous branch predictor accesses
Chips
*
Broadcom
Broadcom Inc. is an American designer, developer, manufacturer and global supplier of a wide range of semiconductor and infrastructure software products. Broadcom's product offerings serve the data center, networking, software, broadband, wirel ...
BCM2711 (used in
Raspberry Pi
Raspberry Pi () is a series of small single-board computers (SBCs) developed in the United Kingdom by the Raspberry Pi Foundation in association with Broadcom. The Raspberry Pi project originally leaned towards the promotion of teaching basic ...
4
)
*
Qualcomm Snapdragon 650, 652, and 653
*
NXP
NXP Semiconductors N.V. (NXP) is a Dutch semiconductor designer and manufacturer with headquarters in Eindhoven, Netherlands. The company employs approximately 31,000 people in more than 30 countries. NXP reported revenue of $11.06 billion in 2 ...
i.MX8, Layerscape LS1046, LS2088, LX2160, LS1028
*
Texas Instruments
Texas Instruments Incorporated (TI) is an American technology company headquartered in Dallas, Texas, that designs and manufactures semiconductors and various integrated circuits, which it sells to electronics designers and manufacturers globa ...
Jacinto 7 family of automotive and industrial SoC processors.
*
Rockchip
Rockchip (Fuzhou Rockchip Electronics Co., Ltd.) is a Chinese fabless semiconductor company based in Fuzhou, Fujian province. Rockchip has been providing SoC products for tablets & PCs, streaming media TV boxes, AI audio & vision, IoT hardware ...
RK3399
See also
*
ARM Cortex-A57
The ARM Cortex-A57 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings. The Cortex-A57 is an out-of-order superscalar pipeline. It is available as SIP core to licensees, and its design makes it ...
, predecessor
*
ARM Cortex-A73
The ARM Cortex-A73 is a central processing unit implementing the ARMv8-A 64-bit instruction set designed by ARM Holdings' Sophia design centre. The Cortex-A73 is a 2-wide decode out-of-order superscalar pipeline. The Cortex-A73 serves as the suc ...
, successor
*
Comparison of ARMv8-A cores
This is a comparison of processors based on the ARM family of instruction sets designed by ARM Holdings and 3rd parties, sorted by version of the ARM instruction set, release and name.
ARMv6
ARMv7-A
This is a table comparing central proc ...
, ARMv8 family
References
External links
*
ARM Cortex-A72 Technical Reference Manuals
{{Application ARM-based chips
ARM processors