In
computer architecture,
a control bus is part of the
system bus
A system bus is a single computer bus that connects the major components of a computer system,
combining the functions of a data bus to carry information, an address bus to determine where it should be sent or read from, and a control bus to det ...
and is used by
CPUs for communicating with other devices within the computer. While the
address bus
In computer architecture, a bus (historically also called a data highway or databus) is a communication system that transfers data between components inside a computer or between computers. It encompasses both hardware (e.g., wires, optical ...
carries the information about the device with which the CPU is communicating and the
data bus carries the actual data being processed, the control bus carries commands from the CPU and returns status signals from the devices. For example, if the data is being read or written to the device the appropriate line (read or write) will be active (
logic one).
Lines
The number and type of lines in a control bus varies but there are basic lines common to all microprocessors, such as:
* Read (
). A single line that when active (logic zero) indicates the device is being read by the CPU.
* Write (
). A single line that when active (logic zero) indicates the device is being written by the CPU.
* Byte enable (
). A group of lines that indicate the size of the data (8, 16, 32, 64 bytes).
The RD and WR signals of the control bus control the reading or writing of RAM, avoiding
bus contention on the data bus.
[
Ian Sinclair; John Dunton]
"Practical Electronics Handbook"
2013.
section "The control bus".
p. 209-210.
Additional lines are microprocessor-dependent, such as:
* Transfer
ACK ("acknowledgement"). Delivers information that the data was acknowledged (read) by the device.
* Bus request (BR, BREQ, or BRQ). Indicates a device is requesting the use of the (data) bus.
* Bus grant (BG or BGRT). Indicates the CPU has granted access to the bus.
*
Interrupt
In digital computers, an interrupt (sometimes referred to as a trap) is a request for the processor to ''interrupt'' currently executing code (when permitted), so that the event can be processed in a timely manner. If the request is accepted ...
request (IRQ). A device with lower
priority is requesting access to the CPU.
* Clock signals. The signal on this line is used to synchronize data between the CPU and a device.
*
Reset. If this line is active, the CPU will perform a
hard reboot.
Systems that have more than one
bus master have additional control bus signals that control which bus master drives the address bus, avoiding bus contention on the address bus.
See also
*
Address bus
In computer architecture, a bus (historically also called a data highway or databus) is a communication system that transfers data between components inside a computer or between computers. It encompasses both hardware (e.g., wires, optical ...
*
Data bus
*
Bus mastering
References
External links
Definitionby
Webopedia.
Computer system organizationat the
University of California, Riverside
The University of California, Riverside (UCR or UC Riverside) is a public university, public Land-grant university, land-grant research university in Riverside, California, United States. It is one of the ten campuses of the University of Cali ...
.
"Hardware and Software Architecture" a
PowerPoint presentation at
California State University, Los Angeles
California State University, Los Angeles (Cal State LA) is a public research university in Los Angeles, California, United States. It is part of the California State University system. Cal State LA offers 142 bachelor's degree programs, 122 m ...
.
Computer buses
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