CP-PLL
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Charge-pump phase-locked loop (CP-PLL) is a modification of
phase-locked loop A phase-locked loop or phase lock loop (PLL) is a control system that generates an output signal whose phase is related to the phase of an input signal. There are several different types; the simplest is an electronic circuit consisting of a ...
s with phase-frequency detector and square waveform signals. CP-PLL allows for a quick lock of the phase of the incoming signal, achieving low steady state phase error.


Phase-frequency detector (PFD)

Phase-frequency detector (PFD) is triggered by the trailing edges of the reference (Ref) and controlled (VCO) signals. The output signal of PFD i(t) can have only three states: 0, +I_p, and -I_p. A trailing edge of the reference signal forces the PFD to switch to a higher state, unless it is already in the state +I_p. A trailing edge of the VCO signal forces the PFD to switch to a lower state, unless it is already in the state -I_p. If both trailing edges happen at the same time, then the PFD switches to zero.


Mathematical models of CP-PLL

A first linear mathematical model of second-order CP-PLL was suggested by F. Gardner in 1980. A nonlinear model without the VCO overload was suggested by M. van Paemel in 1994 and then refined by N. Kuznetsov et al. in 2019. The closed form mathematical model of CP-PLL taking into account the VCO overload is derived in. These mathematical models of CP-PLL allow to get analytical estimations of the hold-in range (a maximum range of the input signal period such that there exists a locked state at which the VCO is not overloaded) and the pull-in range (a maximum range of the input signal period within the hold-in range such that for any initial state the CP-PLL acquires a locked state).


Continuous time linear model of the second order CP-PLL and Gardner's conjecture

Gardner's analysis is based on the following approximation: time interval on which PFD has non-zero state on each period of reference signal is :t_p = , \theta_e, /\omega_,\ \theta_e = \theta_ - \theta_. Then averaged output of charge-pump PFD is :i_d = I_p \theta_e/2\pi with corresponding transfer function :I_d(s) = I_p\theta_e(s)/2\pi Using filter transfer function F(s) = R + \frac and VCO transfer function \theta_(s) = K_I_d(s)F(s)/s one gets Gardner's linear approximated average model of second-order CP-PLL : \frac = \frac. In 1980, F. Gardner, based on the above reasoning, conjectured that ''transient response of practical charge-pump PLL's can be expected to be nearly the same as the response of the equivalent classical PLL'' ( Gardner's conjecture on CP-PLL). Following Gardner's results, by analogy with the Egan conjecture on the pull-in range of type 2 APLL, Amr M. Fahim conjectured in his book that in order to have an infinite pull-in(capture) range, an active filter must be used for the loop filter in CP-PLL (Fahim-Egan's conjecture on the pull-in range of type II CP-PLL).


Continuous time nonlinear model of the second order CP-PLL

Without loss of generality it is supposed that trailing edges of the VCO and Ref signals occur when the corresponding phase reaches an integer number. Let the time instance of the first trailing edge of the Ref signal is defined as t = 0. The PFD state i(0) is determined by the PFD initial state i(0-), the initial phase shifts of the VCO \theta_(0) and Ref \theta_(0) signals. The relationship between the input current i(t) and the output voltage v_F(t) for a proportionally integrating (perfect PI) filter based on resistor and capacitor is as follows : \begin v_F(t) = v_c(0) + Ri(t) + \frac\int\limits_0^t i(\tau)d\tau \end where R>0 is a resistance, C>0 is a capacitance, and v_c(t) is a capacitor charge. The control signal v_F(t) adjusts the VCO frequency: : \begin \dot\theta_(t) = \omega_(t) = \omega_^ + K_v_F(t), \end where \omega_^ is the VCO free-running (quiescent) frequency (i.e. for v_F(t)\equiv 0), K_ is the VCO gain (sensivity), and \theta_(t) is the VCO phase. Finally, the continuous time nonlinear mathematical model of CP-PLL is as follows : \begin \dot v_c(t) = \tfraci(t), \quad \dot\theta_(t) = \omega_^ + K_ ( Ri(t) + v_c(t) ) \end with the following discontinuous piece-wise constant nonlinearity : i(t) = i\big(i(t-), \theta_(t), \theta_(t)\big) and the initial conditions \big(v_c(0), \theta_(0)\big). This model is a nonlinear, non-autonomous, discontinuous, switching system.


Discrete time nonlinear model of the second-order CP-PLL

The reference signal frequency is assumed to be constant: \theta_(t) = \omega_t = \frac, where T_, \omega_ and \theta_(t) are a period, frequency and a phase of the reference signal. Let t_0 = 0. Denote by t_0^ the first instant of time such that the PFD output becomes zero (if i(0)=0, then t_0^=0) and by t_1 the first trailing edge of the VCO or Ref. Further the corresponding increasing sequences \ and \ for k=0,1,2... are defined. Let t_k < t_k^. Then for t \in [t_k,t_k^) the \text(i(t)) is a non-zero constant (\pm1). Denote by \tau_k the PFD pulse width (length of the time interval, where the PFD output is a non-zero constant), multiplied by the sign of the PFD output: i.e. \tau_k = (t_k^ - t_k)\text(i(t)) for t \in [t_k,t_k^) and \tau_k = 0 for t_k=t_k^ . If the VCO trailing edge hits before the Ref trailing edge, then \tau_k < 0 and in the opposite case we have \tau_k > 0, i.e. \tau_k shows how one signal lags behind another. Zero output of PFD i(t) \equiv 0 on the interval (t_k^,t_): v_F(t) \equiv v_k for t \in [t_k^,t_) . The transformation of variables (\tau_k,v_k) to p_k = \frac, u_k=T_ ( \omega_^ + K_v_k ) - 1, allows to reduce the number of parameters to two: \alpha = K_I_pT_R, \beta = \frac. Here p_k is a normalized phase shift and u_k+1 is a ratio of the VCO frequency \omega_^ + K_v_k to the reference frequency \frac. Finally, the discrete-time model of second order CP-PLL without the VCO overload : \begin & u_ = u_k +2\beta p_,\\ & p_ = \begin \frac, \quad \text p_k \geq 0, \quad c_k \leq 0, \\ \frac -1 + ( p_k \text1), \quad \text p_k \geq 0, \quad c_k > 0, \\ l_k-1, \quad \text p_k < 0, \quad l_k \leq 1, \\ \frac, \quad \text p_k < 0, \quad l_k > 1, \end \end where : \begin c_k = (1 - ( p_k \text1))( u_k +1) - 1, S_ = -( u_k - \alpha + 1 ) p_k + \beta p_k^2, l_k = \frac, d_k = (S_ \text1) + u_k. \end This discrete-time model has the only one steady state at (u_k=0,p_k=0) and allows to estimate the hold-in and pull-in ranges. If the VCO is overloaded, i.e. \dot\theta_(t) is zero, or what is the same: (p_k>0, u_k<2\beta p_k-1) or (p_k<0, u_k<\alpha-1), then the additional cases of the CP-PLL dynamics have to be taken into account. For any parameters the VCO overload may occur for sufficiently large frequency difference between the VCO and reference signals. In practice the VCO overload should be avoided.


Nonlinear models of high-order CP-PLL

Derivation of nonlinear mathematical models of high-order CP-PLL leads to transcendental phase equations that cannot be solved analytically and require numerical approaches like the classical fixed-point method or the Newton-Raphson approach.


References

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