Bus Encoding
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Bus encoding refers to converting/encoding a piece of data to another form before launching on the
bus A bus (contracted from omnibus, with variants multibus, motorbus, autobus, etc.) is a road vehicle that carries significantly more passengers than an average car or van. It is most commonly used in public transport, but is also in use for cha ...
. While bus encoding can be used to serve various purposes like reducing the number of pins, compressing the data to be transmitted, reducing cross-talk between bit lines, etc., it is one of the popular techniques used in system design to reduce dynamic power consumed by the
system bus A system bus is a single computer bus that connects the major components of a computer system, combining the functions of a data bus to carry information, an address bus to determine where it should be sent or read from, and a control bus to dete ...
. Bus encoding aims to reduce the
Hamming distance In information theory, the Hamming distance between two strings of equal length is the number of positions at which the corresponding symbols are different. In other words, it measures the minimum number of ''substitutions'' required to chan ...
between 2 consecutive values on the bus. Since the activity is directly proportional to the
Hamming distance In information theory, the Hamming distance between two strings of equal length is the number of positions at which the corresponding symbols are different. In other words, it measures the minimum number of ''substitutions'' required to chan ...
, bus encoding proves to be effective in reducing the overall activity factor thereby reducing the dynamic power consumption in the system. In the context of this article, a system can refer to anything where data is transferred from one element to another over bus (viz.
System on a Chip A system on a chip or system-on-chip (SoC ; pl. ''SoCs'' ) is an integrated circuit that integrates most or all components of a computer or other electronic system. These components almost always include a central processing unit (CPU), memory ...
(SoC), a computer system, an
embedded system An embedded system is a computer system—a combination of a computer processor, computer memory, and input/output peripheral devices—that has a dedicated function within a larger mechanical or electronic system. It is ''embedded'' as ...
on board, etc.).


Motivation

Power consumption in electronic systems is a matter of concern today for the below reasons: # ''Battery-operated devices'': Due to ubiquity of battery operated devices and the need to maximize the duration between two subsequent charging of the battery, it is necessary that the system consumes as less power (and energy) as possible. # ''Environmental constraints'': In an attempt to protect the environment, we need to conserve the usable energy. Since the energy consumed by electronic systems is increasing drastically, minimizing the energy consumption of electronic systems is critical to save the environment. # ''Power dissipation'': As per the
Moore's law Moore's law is the observation that the number of transistors in a dense integrated circuit (IC) doubles about every two years. Moore's law is an observation and projection of a historical trend. Rather than a law of physics, it is an empir ...
, semiconductor devices have been packing more and more transistors in smaller amount of area. This leads to higher power dissipation per unit area and makes packaging and thermal cooling system design complex and costly. Hence, low power electronic systems are needed to tackle this issue. The dynamic power dissipated by an electronic circuit is directly proportional to the activity factor and the load capacitance as seen by the output of the logic gate. In case of a bus, the load capacitance is usually high since bus needs to be connected to multiple modules and routed longer and the activity factor is also high. Due to higher value of load capacitance and activity factor, in a typical system, bus power consumption can contribute up to 50% of the total power consumption. Bus encoding aims to reduce this power by reducing the amount of activity (number of toggles) in the bus lines. While the kind of bus encoding to be used for a particular system can be best determined when the target application and environmental constraints about the system are known apriori, described below are some bus encoding techniques which can help reduce bus power for most systems. Hence bus encoding is important for any electronic system design.


Examples of bus encoding to achieve low power

Following are some of the implementations to use bus encoding for reducing dynamic power consumption in different scenarios: # ''
Gray code addressing The reflected binary code (RBC), also known as reflected binary (RB) or Gray code after Frank Gray, is an ordering of the binary numeral system such that two successive values differ in only one bit (binary digit). For example, the representat ...
'': The address lines of a bus in most of the computing systems increase in consecutive numerical values due to
spatial locality In physics, the principle of locality states that an object is influenced directly only by its immediate surroundings. A theory that includes the principle of locality is said to be a "local theory". This is an alternative to the concept of ins ...
. If we use regular binary coding for the bus, we are not assured of minimal Hamming distance between 2 consecutive addresses. Using Gray codes for encoding the address lines will lead to a Hamming distance of 1 between any 2 consecutive address bus values (as long as spatial locality holds). There are variations to this scheme named Shifted Gray encoding to reduce the delay overhead. # ''Sequential addressing or T0 codes'': In case of address bus, due to spatial locality that exists in programs, most of the transitions involve changing the address to the next consecutive value. A possible encoding scheme is to use an additional line, INC, in the bus indicating whether the current transition is the next increment address or not. If it is not a consecutive address, then the receiver can use the value on the bus. But if it is a consecutive address, the transmitter need not change the value in the bus, but just assert the INC line to 1. In such case, for a continuous addressing scheme, there is no transition at all on the bus, leading to a bus activity factor of 0. # ''Number representation'': Consider an example of a system which gets one of its data from a sensor. Most of the times, the sensor may be measuring some noise and for this example, consider that the values being measured are (0) and (-1) alternatively. For a 32-bit data bus, value 0 translates to 0x00000000 (0000 0000 0000 0000 0000 0000 0000 0000) while (-1) translates to 0xFFFFFFFF (1111 1111 1111 1111 1111 1111 1111 1111) in a 2’s complement representation. We see that the Hamming distance in this case is 32 (since all 32-bits are changing their state). Instead, if we encode the bus to use signed integer representation (MSB is sign bit), we can represent 0 as 0x00000000 (0000 0000 0000 0000 0000 0000 0000 0000) and -1 as 0x80000001 (1000 0000 0000 0000 0000 0000 0000 0001) . In this case, we see that the Hamming distance between the numbers is just 2. Hence by using a 2’s complement to signed arithmetic encoding, we are able to reduce the activity from a factor of 32 to 2. # '' Inversion encoding'': This is another implementation of bus encoding where an additional line named INV is added to the bus lines. Depending on the value of the INV line, the other lines will be used with or without inversion. e.g. if INV line is 0, the data on the bus is sampled as it is but if INV line is 1, the data on the bus is inverted before any processing on it. Referring to the example used in 3, instead of using a signed integer representation, we could continue using 2’s complement and achieve the same activity reduction using inversion encoding. So, 0 will be represented as 0x00000000 with INV=0 and -1 will be represented as 0x00000000 with INV=1. Since INV=1, receiver will invert the data before consuming it, thereby converting it to 0xFFFFFFFF internally. In this case, only 1 bit (INV bit) is changed over bus leading to an activity of factor 1. In general, in inversion encoding, the encoder computes the Hamming distance between the current value and next value and based on that, determines whether to use INV=0 or INV=1. # ''
Value cache encoding Power consumption is becoming increasingly important for both embedded, mobile computing and high-performance systems.Power Protocol: Reducing Power Dissipation on Off-Chip Data Buses http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=117626 ...
'': This is another form of Bus encoding, primarily used for external (off-chip) Busses. A dictionary (value cache) is maintained at both the sender and receiver end about some of the commonly shared data patterns. Instead of passing the data patterns each time, the sender just toggles one bit indicating which entry from value cache to be used at the receiver end. Only for values which are not present in the value cache, the complete data is sent over the bus. There has been various modified implementations of this technique with an intent to maximize the hits for the value cache, but the underlying idea is the same. # ''Other techniques'' like sector-based encoding, variations of inversion coding, have also been proposed. There has been work on using bus encodings which lower the leakage power consumption as well along with reducing the crosstalk with minimal impact on path delays.


Other examples of bus encoding

Many other types of bus encoding have been developed for a variety of reasons: * improved EMC:
differential signaling Differential signalling is a method for electrically transmitting information using two complementary signals. The technique sends the same electrical signal as a differential pair of signals, each in its own conductor. The pair of conducto ...
used in many buses, and the more general
constant-weight code In coding theory, a constant-weight code, also called an ''m''-of-''n'' code, is an error detection and correction code where all codewords share the same Hamming weight. The one-hot code and the balanced code are two widely used kinds of constan ...
used in the MIPI C-PHY
Camera Serial Interface The Camera Serial Interface (CSI) is a specification of the Mobile Industry Processor Interface (MIPI) Alliance. It defines an interface between a camera and a host processor. The latest active interface specifications are CSI-2 v3.0, CSI-3 v1.1 and ...
are both more immune to outside interference, and emit less interference to other devices. * bus multiplexing: Many early microprocessors and many early DRAM chips reduced costs by using bus multiplexing, rather than dedicate a pin to every address bit and data bit of the
system bus A system bus is a single computer bus that connects the major components of a computer system, combining the functions of a data bus to carry information, an address bus to determine where it should be sent or read from, and a control bus to dete ...
. One approach re-uses the address bus pins at different times for data bus pins, Don Lancaster
"TV Typewriter Cookbook"
(
TV Typewriter The TV Typewriter is a video terminal that could display two pages of 16 lines of 32 upper case characters on a standard television set. The design, by Don Lancaster, appeared on the cover of ''Radio-Electronics'' magazine in September 1973. The ...
). Section "Bus Organization". p. 82.
an approach used by
conventional PCI Peripheral Component Interconnect (PCI) is a local computer bus for attaching hardware devices in a computer and is part of the PCI Local Bus standard. The PCI bus supports the functions found on a processor bus but in a standardized format th ...
. Another approach re-uses the same pins at different times for the upper half and for the lower half of the address bus, an approach used by many
dynamic random-access memory Dynamic random-access memory (dynamic RAM or DRAM) is a type of random-access semiconductor memory that stores each bit of data in a memory cell, usually consisting of a tiny capacitor and a transistor, both typically based on metal-oxide ...
chips, adding 2 pins to the control bus -- a row-address strobe () and the column-address strobe ().


Implementation method

In case of SoC designs, bus encoding schemes can be best implemented in RTL by instantiating dedicated encoders and decoders over the bus. Another way it could be implemented is by passing hint to the synthesis tool either as a trace of the simulation or by using synthesis pragma to define the type of encoding needed. On board, a small low power IC can be deployed in between the master and slave modules on the bus to implement the encoding and decoding functions.


Properties of the encoding function

The bus encoding/decoding function must be a
bijection In mathematics, a bijection, also known as a bijective function, one-to-one correspondence, or invertible function, is a function between the elements of two sets, where each element of one set is paired with exactly one element of the other s ...
. This essentially requires encoding function to possess below behavior: # Every data to be launched on the bus must have a unique encoded value and every encoded value must uniquely decode to the same original value. # It must be possible to encode and decode all the values which can be generated by the source.


Trade-off / analysis

* While adding of bus encoding reduces the activity factor over the bus and leads to reduction in dynamic power, addition of encoders and decoders around the bus causes additional circuitry to be added to the design, which also consume certain amount of dynamic power. We must factor this while computing the power savings. * The additional circuitry will also increase the leakage power of the design/circuit/system/SoC. If the base activity factor of the system bus is not very high, bus encoding may not be a very viable option since it will degrade overall energy consumption due to higher leakage power. * If the bus timing is in the critical data path, adding of additional circuitry in the path will degrade the timing path and may prove detrimental. This analysis needs to be done carefully to determine what kind of bus encoding to use.


See also

*
Gray code addressing The reflected binary code (RBC), also known as reflected binary (RB) or Gray code after Frank Gray, is an ordering of the binary numeral system such that two successive values differ in only one bit (binary digit). For example, the representat ...
*
Power dissipation In thermodynamics, dissipation is the result of an irreversible process that takes place in homogeneous thermodynamic systems. In a dissipative process, energy (internal, bulk flow kinetic, or system potential) transforms from an initial form to a ...
*
Low power electronics Low-power electronics are electronics, such as notebook processors, that have been designed to use less electric power than usual, often at some expense. In the case of notebook processors, this expense is processing power; notebook processors usu ...
*
Glitch removal Glitch removal is the elimination of glitchesunnecessary signal transitions without functionalityfrom electronic circuits. Power dissipation of a gate occurs in two ways: static power dissipation and dynamic power dissipation. Glitch power comes un ...
*
Green computing Green computing, green IT, or ICT sustainability, is the study and practice of environmentally sustainable computing or IT. The goals of green computing are similar to green chemistry: reduce the use of hazardous materials, maximize energy effici ...


References


Further reading

* {{cite report , author-first1=Ching-Long , author-last1=Su , author-first2=Chi-Ying , author-last2=Tsui , author-first3=Alvin M. , author-last3=Despain , url=http://www.scarpaz.com/2100-papers/Power%20Estimation/su94-low%20power%20architecture%20and%20compilation.pdf , title=Low Power Architecture Design and Compilation Techniques for High-Performance Processors , date=1994 , publisher=Advanced Computer Architecture Laboratory , id=ACAL-TR-94-01 Digital electronics Electronics optimization