The Blackfin is a family of 16-/32-bit
microprocessor
A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circ ...
s developed, manufactured and marketed by
Analog Devices. The processors have built-in, fixed-point
digital signal processor (DSP) functionality supplied by 16-bit
multiply–accumulates (MACs), accompanied on-chip by a
microcontroller. It was designed for a unified
low-power processor architecture that can run
operating system
An operating system (OS) is system software that manages computer hardware, software resources, and provides common daemon (computing), services for computer programs.
Time-sharing operating systems scheduler (computing), schedule tasks for ef ...
s while simultaneously handling complex numeric tasks such as
real-time
Real-time or real time describes various operations in computing or other processes that must guarantee response times within a specified time (deadline), usually a relatively short time. A real-time process is generally one that happens in defined ...
H.264 video encoding
In information theory, data compression, source coding, or bit-rate reduction is the process of encoding information using fewer bits than the original representation. Any particular compression is either lossy or lossless. Lossless compressi ...
.
Architecture details
Blackfin processors use a
32-bit
In computer architecture, 32-bit computing refers to computer systems with a processor, memory, and other major system components that operate on data in 32- bit units. Compared to smaller bit widths, 32-bit computers can perform large calculati ...
RISC microcontroller programming model on a
SIMD architecture, which was co-developed by
Intel
Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 ser ...
and
Analog Devices, as MSA (Micro Signal Architecture).
The architecture was announced in December 2000, and first demonstrated at the Embedded Systems Conference in June, 2001.
It incorporates aspects of ADI's older
SHARC architecture and Intel's
XScale architecture into a single core, combining digital signal processing (DSP) and microcontroller functionality. There are many differences in the core architecture between Blackfin/MSA and XScale/ARM or SHARC, but the combination was designed to improve performance, programmability and power consumption over traditional DSP or RISC architecture designs.
The Blackfin architecture encompasses various CPU models, each targeting particular applications. The BF-7xx series, introduced in 2014, comprise the Blackfin+ architecture, which expands on the Blackfin architecture with some new processor features and instructions.
Architecture features
Core features
What is regarded as the Blackfin "core" is contextually dependent. For some applications, the
DSP features are central. Blackfin has two 16-bit hardware
MACs, two 40-bit
ALUs and
accumulators, a 40-bit
barrel shifter, and four 8-bit video ALUs; Blackfin+ processors add a 32-bit MAC and 72-bit accumulator. This allows the processor to execute up to three instructions per clock cycle, depending on the level of
optimization performed by the
compiler
In computing, a compiler is a computer program that translates computer code written in one programming language (the ''source'' language) into another language (the ''target'' language). The name "compiler" is primarily used for programs tha ...
or
programmer. Two nested
zero-overhead loops and four circular buffer DAGs (data address generators) are designed to assist in writing efficient code requiring fewer
instructions. Other applications use the
RISC features, which include memory protection, different operating modes (user, kernel), single-cycle
opcodes, data and instruction caches, and instructions for bit test, byte, word, or integer accesses and a variety of on-chip peripherals.
The
ISA
Isa or ISA may refer to:
Places
* Isa, Amur Oblast, Russia
* Isa, Kagoshima, Japan
* Isa, Nigeria
* Isa District, Kagoshima, former district in Japan
* Isa Town, middle class town located in Bahrain
* Mount Isa, Queensland, Australia
* Mount ...
is designed for a high level of
expressiveness, allowing the assembly programmer (or
compiler
In computing, a compiler is a computer program that translates computer code written in one programming language (the ''source'' language) into another language (the ''target'' language). The name "compiler" is primarily used for programs tha ...
) to optimize an algorithm for the hardware features present. The standard Blackfin assembly language is written using an algebraic syntax: instead of prefix commands used in many other assembly languages.
Memory and DMA
The Blackfin uses a
byte-addressable, flat
memory map
In computer science, a memory map is a structure of data (which usually resides in memory itself) that indicates how memory is laid out. The term "memory map" can have different meanings in different contexts.
*It is the fastest and most flexible ...
. Internal L1 memory, internal L2 memory, external memory and all memory-mapped
control register
A control register is a processor register which changes or controls the general behavior of a CPU or other digital device. Common tasks performed by control registers include interrupt control, switching the addressing mode, paging control, ...
s reside in this 32-bit address space, so that from a programming point of view, the Blackfin has a
Von Neumann architecture
The von Neumann architecture — also known as the von Neumann model or Princeton architecture — is a computer architecture based on a 1945 description by John von Neumann, and by others, in the '' First Draft of a Report on the EDVAC''. T ...
.
The L1 internal
SRAM memory, which runs at the core-clock speed of the device, is based on a
Harvard architecture
The Harvard architecture is a computer architecture with separate storage and signal pathways for instructions and data. It contrasts with the von Neumann architecture, where program instructions and data share the same memory and pathway ...
. Instruction memory and data memory are independent and connect to the core via dedicated memory buses, designed for higher sustained
data rates between the core and L1 memory.
Portions of instruction and data L1 SRAM can be optionally configured as cache independently.
Certain Blackfin processors also have between 64KB and 256KB of L2 memory. This memory runs slower than the core clock speed. Code and data can be mixed in L2.
Blackfin processors support a variety of external memories including
SDRAM
Synchronous dynamic random-access memory (synchronous dynamic RAM or SDRAM) is any DRAM where the operation of its external pin interface is coordinated by an externally supplied clock signal.
DRAM integrated circuits (ICs) produced from the ...
,
DDR-SDRAM,
NOR flash,
NAND flash
Flash memory is an Integrated circuit, electronic Non-volatile memory, non-volatile computer memory storage medium that can be electrically erased and reprogrammed. The two main types of flash memory, NOR flash and NAND flash, are named for t ...
and
SRAM. Some Blackfin processors also include mass-storage interfaces such as
ATAPI
ATA Packet Interface (ATAPI) is a protocol that has been added to Parallel ATA and Serial ATA so that a greater variety of devices can be connected to a computer than with the ATA command set alone. It carries SCSI commands and responses through t ...
and
SD/SDIO. They can support hundreds of megabytes of memory in the external memory space.
Coupled with the core and memory system is a
DMA
DMA may refer to:
Arts
* DMA (magazine), ''DMA'' (magazine), a defunct dance music magazine
* Dallas Museum of Art, an art museum in Texas, US
* Danish Music Awards, an award show held in Denmark
* BT Digital Music Awards, an annual event in the U ...
engine that can operate between any of its
peripheral
A peripheral or peripheral device is an auxiliary device used to put information into and get information out of a computer. The term ''peripheral device'' refers to all hardware components that are attached to a computer and are controlled by the ...
s and main (or external) memory. The processors typically have a dedicated
DMA channel
Direct memory access (DMA) is a feature of computer systems and allows certain hardware subsystems to access main system memory independently of the central processing unit (CPU).
Without DMA, when the CPU is using programmed input/output, it is ...
for each peripheral, which is designed for higher
throughput for applications that can use it, such as real-time standard-definition (D1) video encoding and decoding.
Microcontroller features
The architecture of Blackfin contains the usual CPU, memory, and I/O that is found on
microprocessor
A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circ ...
s or
microcontrollers. These features enable operating systems.
All Blackfin processors contain a
Memory Protection Unit (MPU). The MPU provides protection and caching strategies across the entire memory space. The MPU allows Blackfin to support operating systems,
RTOS
A real-time operating system (RTOS) is an operating system (OS) for real-time applications that processes data and events that have critically defined time constraints. An RTOS is distinct from a time-sharing operating system, such as Unix, which ...
s and kernels like
ThreadX, μC/OS-II, or NOMMU Linux. Although the MPU is referred to as a
Memory Management Unit (MMU) in the Blackfin documentation, the Blackfin MPU does not provide
address translation like a traditional MMU, so it does not support
virtual memory
In computing, virtual memory, or virtual storage is a memory management technique that provides an "idealized abstraction of the storage resources that are actually available on a given machine" which "creates the illusion to users of a very ...
or separate memory addresses per process. This is why Blackfin currently can not support operating systems requiring virtual memory such as
WinCE
Windows Embedded Compact, formerly Windows Embedded CE, Windows Powered and Windows CE, is an operating system subfamily developed by Microsoft as part of its Windows Embedded family of products.
Unlike Windows Embedded Standard, which is ba ...
or
QNX.
Blackfin supports three
run-time modes: supervisor, user and emulation. In supervisor mode, all processor resources are accessible from the running process. However, when in user mode, system resources and regions of memory can be protected (with the help of the MPU). In a modern operating system or RTOS, the kernel typically runs in supervisor mode and threads/processes will run in user mode. If a thread crashes or attempts to access a protected resource (memory, peripheral, etc.) an
exception will be thrown and the kernel will then be able to shut down the offending thread/process. The official guidance from ADI on how to use the Blackfin in non-OS environments is to reserve the lowest-priority interrupt for general-purpose code so that all software is run in supervisor space.
Blackfin uses a variable-length
RISC-like instruction set consisting of 16-, 32- and 64-bit instructions. Commonly used control instructions are encoded as 16-bit opcodes while complex DSP and mathematically intensive functions are encoded as 32- and 64-bit opcodes. This variable length opcode encoding is designed for
code density
In computer science, an instruction set architecture (ISA), also called computer architecture, is an abstract model of a computer. A device that executes instructions described by that ISA, such as a central processing unit (CPU), is called an ...
equivalence to modern microprocessor architectures.
Media-processing features
The Blackfin instruction set contains media-processing extensions to help accelerate pixel-processing operations commonly used in
video compression and
image compression and decompression algorithms.
Peripherals
Blackfin processors contain an array of connectivity peripherals, depending on the specific processor:
*
ATAPI
ATA Packet Interface (ATAPI) is a protocol that has been added to Parallel ATA and Serial ATA so that a greater variety of devices can be connected to a computer than with the ATA command set alone. It carries SCSI commands and responses through t ...
*
CAN: A wide-area, low-speed serial bus used in some automotive and industrial electronics
*
DMA
DMA may refer to:
Arts
* DMA (magazine), ''DMA'' (magazine), a defunct dance music magazine
* Dallas Museum of Art, an art museum in Texas, US
* Danish Music Awards, an award show held in Denmark
* BT Digital Music Awards, an annual event in the U ...
with support for memory-to-memory DMA and peripheral DMA
* EMAC (
Ethernet
Ethernet () is a family of wired computer networking technologies commonly used in local area networks (LAN), metropolitan area networks (MAN) and wide area networks (WAN). It was commercially introduced in 1980 and first standardized in 1 ...
Media Access Controller) with
MII and
RMII
The media-independent interface (MII) was originally defined as a standard interface to connect a Fast Ethernet (i.e., ) media access control (MAC) block to a PHY chip. The MII is standardized by IEEE 802.3u and connects different types of PHYs ...
* External memory: the EBIU (External Bus Interface Unit) can include a controller for SDRAM, Mobile SDRAM, DDR1, DDR2, or LPDDR, and an asynchronous memory controller for SRAM, ROM, flash EPROM, and memory-mapped I/O devices
*
GPIO including level-triggered and edge-triggered interrupts
*
I²C
I2C (Inter-Integrated Circuit, ), alternatively known as I2C or IIC, is a synchronous, multi-controller/multi-target (master/slave), packet switched, single-ended, serial communication bus invented in 1982 by Philips Semiconductors. It is wid ...
, also known as TWI (Two-Wire Interface): a lower speed, shared serial bus
* MXVR: a
MOST Network Interface Controller
* NAND flash
*
PPI: A parallel input/output port that can be used to connect to LCDs, video encoders (video DACs), video decoders (video ADCs), CMOS sensors, CCDs and generic, parallel, high-speed devices. The PPI can run up to 75 MHz and can be configured from 8 to 16-bits wide.
*
PWM and timers/counters
*
Real time clock
A real-time clock (RTC) is an electronic device (most often in the form of an integrated circuit) that measures the passage of time.
Although the term often refers to the devices in personal computers, servers and embedded systems, RTCs are ...
*
SD/SDIO
*
SPI: a fast serial bus used in some high-speed embedded electronics applications
* SPORT: A synchronous, high speed serial port that can support
TDM,
I²S and a number of other configurable framing modes for connection to
ADCs,
DACs, other processors, FPGAs, etc.
*
UART: allows for bi-directional communication with
RS-232
In telecommunications, RS-232 or Recommended Standard 232 is a standard originally introduced in 1960 for serial communication transmission of data. It formally defines signals connecting between a ''DTE'' ('' data terminal equipment'') suc ...
devices (PCs, modems, PC peripherals, etc.),
MIDI
MIDI (; Musical Instrument Digital Interface) is a technical standard that describes a communications protocol, digital interface, and electrical connectors that connect a wide variety of electronic musical instruments, computers, and ...
devices,
IRDA
The Infrared Data Association (IrDA) is an industry-driven interest group that was founded in 1994 by around 50 companies. IrDA provides specifications for a complete set of protocols for wireless infrared communications, and the name "IrDA" also ...
devices
*
USB 2.0 OTG (On-The-Go)
*
Watchdog timer
All of the peripheral control registers are
memory-mapped in the normal address space.
Development tools
ADI provides its own software development
toolchains. The original VisualDSP++
IDE is still supported (its last release was 5.1.2 in ), but is approaching end of life and has not had support added for the new BF6xx and BF7xx processors. The newer toolchain is CrossCore Embedded Studio, which uses supports all Blackfin and Blackfin+ processors using upgraded versions of the same compiler and tools internally, but with a UI based on
Eclipse CDT. No free version of either tool is available; a single-user license for VisualDSP++ costs $3500 USD, and CrossCore Embedded Studio $995 USD.
Other options include
Green Hills Software's MULTI IDE and the GNU
GCC Toolchain for the Blackfin processor family. However, like VisualDSP++, these have not been updated to support the newer BF6xx and BF7xx processors. Moreover, neither support all BF5xx processors. Green Hills MULTI lacks support for BF50x, BF51x, some BF52x, BF547, and BF59x. GCC lacks support for BF50x, BF566, and BF59x, and has incomplete support for BF561.
Blackfin is also supported by
National Instruments'
LabVIEW Embedded Module, which requires VisualDSP++.
Supported operating systems, RTOSs and kernels
Several commercial and open-source operating systems support running on Blackfin.
Blackfin was previously supported by
μClinux and later by
Linux
Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, whi ...
with the NOMMU feature, but as it was not ever widely used and no longer had a maintainer, support was removed from Linux on April 1, 2018; 4.16 was the last release to include Blackfin support.
See also
*
SHARC
*
TigerSHARC
TigerSHARC refers to a family of microprocessors currently manufactured by Analog Devices Inc (ADI).
See also
* SHARC
*Blackfin
The Blackfin is a family of 16-/32-bit microprocessors developed, manufactured and marketed by Analog Devices. ...
References
External links
Blackfin processor websiteBlackfin Processor Programming Referenceblackfin.uclinux.orgOpen source tools and Linux kernel for Blackfin
A build-system supporting the cross compilation to Blackfin
{{RISC-based processor architectures
Computer-related introductions in 2000
Instruction set architectures
Microcontrollers
Digital signal processors