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The Athlon 64 is a ninth-generation,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
-architecture
microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circ ...
produced by
Advanced Micro Devices Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufact ...
(AMD), released on September 23, 2003. It is the third processor to bear the name ''
Athlon Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD). The original Athlon (now called Athlon Classic) was the first seventh-generation x86 processor and the fi ...
'', and the immediate successor to the
Athlon XP Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices (AMD). The original Athlon (now called Athlon Classic) was the first seventh-generation x86 processor and the fi ...
. The second processor (after the
Opteron Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sledg ...
) to implement the AMD64 architecture and the first
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A compu ...
processor targeted at the average consumer, it was AMD's primary consumer CPU, and primarily competed with
Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...
's
Pentium 4 Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 200 ...
, especially the ''Prescott'' and ''Cedar Mill'' core revisions. It is AMD's first K8, eighth-generation processor core for desktop and mobile computers. Despite being natively 64-bit, the AMD64 architecture is backward-compatible with 32-bit
x86 x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was intr ...
instructions. Athlon 64s have been produced for
Socket 754 Socket 754 is a CPU socket originally developed by AMD to supersede its Athlon XP platform (Socket 462, also referred to as Socket A). Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit micropro ...
,
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
,
Socket 940 Socket 940 is a 940-pin socket for 64-bit AMD Opteron server processors and AMD Athlon 64 FX consumer processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the proce ...
, and Socket AM2. The line was succeeded by the dual-core
Athlon 64 X2 The Athlon 64 X2 is the first native dual-core desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with ano ...
and
Athlon X2 The Athlon 64 X2 is the first native dual-core desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with anot ...
lines.


Background

The Athlon 64 was originally codenamed ''ClawHammer'' by AMD, and was referred to as such internally and in press releases. The first Athlon 64 FX was based on the first
Opteron Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sledg ...
core, ''SledgeHammer''. Both cores, produced on a 130 nanometer process, were first introduced on September 23, 2003. The models first available were the FX-51, fitting Socket 940, and the 3200+, fitting Socket 754. Like the Opteron, on which it was based, the Athlon FX-51 required buffered
random-access memory Random-access memory (RAM; ) is a form of computer memory that can be read and changed in any order, typically used to store working data and machine code. A random-access memory device allows data items to be read or written in almost the ...
(RAM), increasing the final cost of an upgrade. The week of the Athlon 64's launch, Intel released the
Pentium 4 Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 200 ...
Extreme Edition, a CPU designed to compete with the Athlon 64 FX. The Extreme Edition was widely considered a marketing ploy to draw publicity away from AMD, and was quickly nicknamed among some circles the "Emergency Edition". Despite a very strong demand for the chip, AMD experienced early manufacturing difficulties that made it difficult to deliver Athlon 64s in quantity. In the early months of the Athlon 64 lifespan, AMD could only produce 100,000 chips per month. However, it was very competitive in terms of performance to the Pentium 4, with magazine
PC World ''PC World'' (stylized as PCWorld) is a global computer magazine published monthly by IDG. Since 2013, it has been an online only publication. It offers advice on various aspects of PCs and related items, the Internet, and other personal tech ...
calling it the "fastest yet". The Athlon FX-51 also outperforming the Pentium 4 3.2C in
Quake III Arena ''Quake III Arena'' is a 1999 multiplayer-focused first-person shooter developed by id Software. The third installment of the ''Quake'' series, ''Arena'' differs from previous games by excluding a story-based single-player mode and focusing prima ...
and
Unreal Tournament 2003 ''Unreal Tournament 2003'' is a first-person arena shooter video game developed by Epic Games and Digital Extremes, and published by Infogrames under the Atari brand name. The game is part of the ''Unreal'' franchise, and is a sequel to 1999's ...
Benchmark, According to
Maximum PC ''Maximum PC'', formerly known as ''boot'', is an American magazine and website published by Future US. It focuses on cutting-edge PC hardware, with an emphasis on product reviews, step-by-step tutorials, and in-depth technical briefs. Component ...
. "Newcastle" was released soon after ClawHammer, with half the Level 2
cache Cache, caching, or caché may refer to: Places United States * Cache, Idaho, an unincorporated community * Cache, Illinois, an unincorporated community * Cache, Oklahoma, a city in Comanche County * Cache, Utah, Cache County, Utah * Cache County ...
.


Single-core Athlon 64

All the 64-bit processors sold by AMD so far have their genesis in the ''K8'' or ''Hammer'' project. On June 1, 2004, AMD released new versions of both the ClawHammer and Newcastle core revisions for the newly introduced
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, an altered
Socket 940 Socket 940 is a 940-pin socket for 64-bit AMD Opteron server processors and AMD Athlon 64 FX consumer processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the proce ...
without the need for buffered memory. Socket 939 offered two main improvements over Socket 754: the
memory controller The memory controller is a digital circuit that manages the flow of data going to and from the computer's main memory. A memory controller can be a separate chip or integrated into another chip, such as being placed on the same die or as an int ...
was altered with
dual-channel architecture In the fields of digital electronics and computer hardware, multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between ...
, doubling peak memory bandwidth, and the
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
bus was increased in speed from 800 MHz to 1000 MHz. Socket 939 also was introduced in the FX series in the form of the FX-55. At the same time, AMD also began to ship the "Winchester" core, based on a 90 nanometer process. Core revisions "Venice" and "San Diego" succeeded all prior revisions on April 15, 2005. Venice, the lower-end part, was produced for both Sockets 754 and 939, and included 512  kB of L2 cache. San Diego, the higher-end chip, was produced only for Socket 939 and doubled Venice's L2 cache to 1  MB. Both were produced on the 90 nm fabrication process. Both also included support for the
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
instruction set, a new feature that had been included in the rival
Pentium 4 Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 200 ...
since the release of the Prescott core in February 2004. In addition, AMD overhauled the memory controller for this revision, resulting in performance improvements as well as support for newer DDR RAM.


Dual-core Athlon 64

On April 21, 2005, less than a week after the release of Venice and San Diego, AMD announced its next addition to the Athlon 64 line, the
Athlon 64 X2 The Athlon 64 X2 is the first native dual-core desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with ano ...
. Released on May 31, 2005, it also initially had two different core revisions available to the public, Manchester and Toledo, the only appreciable difference between them being the amount of L2 cache. Both were released only for Socket 939. The Athlon 64 X2 was received very well by reviewers and the general public, with a general consensus emerging that AMD's implementation of multi-core was superior to that of the competing
Pentium D Pentium D is a range of desktop 64-bit x86-64 processors based on the NetBurst microarchitecture, which is the dual-core variant of the Pentium 4 manufactured by Intel. Each CPU comprised two dies, each containing a single core, residing next to ...
. Some felt initially that the X2 would cause market confusion with regard to price points since the new processor was targeted at the same "enthusiast," US$350 and above market already occupied by AMD's existing socket 939 Athlon 64s. AMD's official breakdown of the chips placed the Athlon X2 aimed at a segment they called the " prosumer", along with digital media fans. The Athlon 64 was targeted at the mainstream consumer, and the Athlon FX at gamers. The
Sempron Sempron has been the marketing name used by AMD for several different budget desktop CPUs, using several different technologies and CPU socket formats. The Sempron replaced the AMD Duron processor and competed against Intel's Celeron series of pr ...
budget processor was targeted at value-conscious consumers. Following the launch of the Athlon 64 X2, AMD surpassed Intel in US retail sales for a period of time, although Intel retained overall market leadership because of its exclusive relationships with direct sellers such as Dell.


DDR2

The Athlon 64 had been maligned by some critics for some time because of its lack of support for DDR2 SDRAM, an at the time emerging technology that had been adopted much earlier by Intel. AMD's official position was that the
CAS latency Column Address Strobe (CAS) latency, or CL, is the delay in clock cycles between the READ command and the moment data is available. In asynchronous DRAM, the interval is specified in nanoseconds (absolute time). In synchronous DRAM, the interval ...
on DDR2 had not progressed to a point where it would be advantageous for the consumer to adopt it. AMD finally remedied this gap with the "Orleans" core revision, the first Athlon 64 to fit Socket AM2, released on May 23, 2006. "Windsor", an Athlon 64 X2 revision for Socket AM2, was released concurrently. Both Orleans and Windsor have either 512 kB or 1 MB of L2 cache per core. The Athlon 64 FX-62 was also released concurrently on the Socket AM2 platform. Socket AM2 also uses less power than prior platforms, and supports AMD-V. The memory controller used in all DDR2 SDRAM capable processors (Socket AM2), has extended column address range of 11 columns instead of conventional 10 columns, and the support of 16 kB page size, with at most 2048 individual entries supported. An OCZ unbuffered DDR2 kit, optimized for
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A compu ...
operating systems, was released to exploit the functionality provided by the memory controller in socket AM2 processors, allowing the memory controller to stay longer on the same page, thus benefitting graphics intensive applications.


Moving to the subnotebook space

The Athlon architecture was further extended with the release of Athlon Neo processors on January 9, 2009. Based on the same architecture as the other Athlon 64 variants, the new processor features a small package footprint targeting Ultra-portable notebook market.


Features

There are four variants: ''Athlon 64'', ''Athlon 64 FX'', ''Mobile Athlon 64'' (later renamed "
Turion 64 AMD Turion is the brand name AMD applies to its x86-64 low-power consumption (''mobile'') processors codenamed ''K8L''. The Turion 64 and Turion 64 X2/Ultra processors compete with Intel's mobile processors, initially the '' Pentium M'' and the I ...
") and the dual-core ''
Athlon 64 X2 The Athlon 64 X2 is the first native dual-core desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with ano ...
''. Common among the Athlon 64 line are a variety of instruction sets including MMX,
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2, and
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
. All Athlon 64s also support the
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, a security feature named "Enhanced Virus Protection" by AMD. And as implementations of the AMD64 architecture, all Athlon 64 variants are able to run 16 bit, 32 bit
x86 x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was intr ...
, and
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
code, through two different modes the processor can run in: " Legacy mode" and "long mode". Legacy mode runs 16-bit and 32-bit programs natively, and long mode runs 64-bit programs natively, but also allows for 32-bit programs running inside a 64-bit
operating system An operating system (OS) is system software that manages computer hardware, software resources, and provides common services for computer programs. Time-sharing operating systems schedule tasks for efficient use of the system and may also i ...
. All Athlon 64 processors feature 128 
Kilobyte The kilobyte is a multiple of the unit byte for digital information. The International System of Units (SI) defines the prefix '' kilo'' as 1000 (103); per this definition, one kilobyte is 1000 bytes.International Standard IEC 80000-13 Quant ...
s of level 1 cache, and at least 512 kB of level 2 cache.


On-die memory controller

The Athlon 64 features an on-die memory controller, a feature formerly seen on only the
Transmeta Crusoe The Transmeta Crusoe is a family of x86-compatible microprocessors developed by Transmeta and introduced in 2000. Instead of the instruction set architecture being implemented in hardware, or translated by specialized hardware, the Crusoe runs ...
. This means the controller runs at the same
clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
as the CPU, and that the electrical signals have a shorter physical distance to travel compared to the old northbridge interfaces. The result is a significant reduction in latency (response time) for access requests to main memory. The lower latency was often cited as one of the advantages of the Athlon 64's architecture over those of its competitors at the time.


Memory and HT Northbridge buses

As the memory controller is integrated onto the CPU die, there is no FSB for the system memory to base its speed upon. Instead, system memory speed is obtained by using the following formula (using the
ceiling function In mathematics and computer science, the floor function is the function that takes as input a real number , and gives as output the greatest integer less than or equal to , denoted or . Similarly, the ceiling function maps to the least int ...
): :\frac=\mathrm In simpler terms, the memory is always running at a set fraction of the CPU speed, with the divisor being a whole number. An 'FSB' figure is still used to determine the CPU speed, but the RAM speed is no longer directly related to this 'FSB' figure (known otherwise as the LDT). A second bus, the northbridge, connected the CPU to the chipset and device attachment bus (PCIe, AGP, PCI). This was implemented using a new high-performance standard,
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
. AMD attempted, with some success, to make this an industry standard. It was also useful in building multi-processor systems without additional glue chips.


Translation lookaside buffers

Translation lookaside buffer A translation lookaside buffer (TLB) is a memory cache that stores the recent translations of virtual memory to physical memory. It is used to reduce the time taken to access a user memory location. It can be called an address-translation cache. ...
s (TLBs) have also been enlarged (40 4k/2M/4M entries in L1 cache, 512 4k entries), with reduced latencies and improved
branch prediction In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch (e.g., an if–then–else structure) will go before this is known definitively. The purpose of the branch predictor is to improve the flow ...
, with four times the number of bimodal counters in the global history counter. This and other architectural enhancements, especially as regards SSE implementation, improve
instructions per cycle In computer architecture, instructions per cycle (IPC), commonly called instructions per clock is one aspect of a processor's performance: the average number of instructions executed for each clock cycle. It is the multiplicative inverse of c ...
(, IPC) performance over the prior Athlon XP generation. To make this easier for consumers to understand, AMD has chosen to market the Athlon 64 using a PR (Performance Rating) system, where the numbers roughly map to Pentium 4 performance equivalents, rather than actual clock speed.


Cool'n'Quiet

Athlon 64 also features CPU speed throttling technology branded ''
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
'', a feature similar to Intel's ''
SpeedStep Enhanced SpeedStep is a series of dynamic frequency scaling technologies (codenamed Geyserville and including SpeedStep, SpeedStep II, and SpeedStep III) built into some Intel microprocessors that allow the clock speed of the processor to be dyna ...
'' that can throttle the processor's clock speed back to facilitate lower power use and heat output. When the user is running undemanding applications and the load on the processor is light, the processor clock speed and voltage are reduced. This in turn reduces its peak power use (max
thermal design power The thermal design power (TDP), sometimes called thermal design point, is the maximum amount of heat generated by a computer chip or component (often a CPU, GPU or system on a chip) that the cooling system in a computer is designed to dissipate ...
(TDP) set at 89 W by AMD) to as low as 32 W ( stepping level C0, clock speed reduced to 800 MHz) or 22W (stepping CG, clock speed reduced to 1 GHz). The Athlon 64 also has an ''integrated
heat spreader A heat spreader transfers energy as heat from a hotter source to a colder heat sink or heat exchanger. There are two thermodynamic types, passive and active. The most common sort of passive heat spreader is a plate or block of material having hi ...
'' (IHS) which prevents the CPU die from being damaged accidentally when mounting and unmounting heat sinks. With prior AMD CPUs, a CPU shim could be used by people worried about damaging the die.


NX bit

The ''No Execute bit'' (
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
) supported by
Windows XP Windows XP is a major release of Microsoft's Windows NT operating system. It was released to manufacturing on August 24, 2001, and later to retail on October 25, 2001. It is a direct upgrade to its predecessors, Windows 2000 for high-end and ...
Service Pack 2 and future versions of Windows,
Linux Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, w ...
2.6.8 and higher and FreeBSD 5.3 and higher is also included, for improved protection from malicious buffer overflow security threats. Hardware-set permission levels make it much more difficult for malicious code to take control of the system. It is intended to make
64-bit computing In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A co ...
a more secure environment.


Semiconductor Technology

The Athlon 64 CPUs have been produced with 130 and 90 nm silicon on insulator (SOI) process technologies. All of the latest chips (Winchester, Venice, and San Diego models) are on 90 nm. The Venice and San Diego models also incorporate dual stress liner technology (an amalgam of strained silicon and 'squeezed silicon', the latter of which is not actually a technology) co-developed with IBM.


Processor cores


Athlon 64 FX

The Athlon 64 FX is positioned as a hardware enthusiast product, marketed by AMD especially toward gamers. Unlike the standard Athlon 64, all of the Athlon 64 FX processors have their multipliers completely unlocked. Starting with the FX-60, the FX line became dual-core. The FX always has the highest clock speed of all Athlons at its release. From FX-70 onwards, the line of processors will also support dual-processor setup with
NUMA Nuclear mitotic apparatus protein 1 is a protein that in humans is encoded by the ''NUMA1'' gene. Interactions Nuclear mitotic apparatus protein 1 has been shown to interact with PIM1, Band 4.1, GPSM2 G-protein-signaling modulator 2, also call ...
, named AMD Quad FX platform.


Athlon 64 X2

The Athlon 64 X2 is the first
dual-core A multi-core processor is a microprocessor on a single integrated circuit with two or more separate processing units, called cores, each of which reads and executes program instructions. The instructions are ordinary CPU instructions (such ...
desktop A desktop traditionally refers to: * The surface of a desk (often to distinguish office appliances that fit on a desk, such as photocopiers and printers, from larger equipment covering its own area on the floor) Desktop may refer to various compu ...
CPU manufactured by
AMD Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufactur ...
. In 2007, AMD released two final Athlon 64 X2 versions: the AMD Athlon 64 X2 6400+ and 5000+ Black Editions. Both processors feature an unlocked multiplier, which allows for a large range of overclocked settings. The 6400+ is based on a 90 nm Windsor core (3.2 GHz, 2x1 MB L2, 125 W TDP) while the 5000+ is based on a 65 nm Brisbane core (2.6 GHz, 2 x 512 kB L2, 65 W TDP). These Black Edition processors are available at retail, but AMD does not include heatsinks in the retail package.


Turion 64 (formerly Mobile Athlon 64)

Formerly introduced as ''Mobile Athlon 64'', ''Turion 64'' is now the
brand name A brand is a name, term, design, symbol or any other feature that distinguishes one seller's good or service from those of other sellers. Brands are used in business, marketing, and advertising for recognition and, importantly, to create an ...
AMD Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufactur ...
applies to its 64-bit low-power use (''mobile'')
processors A central processing unit (CPU), also called a central processor, main processor or just processor, is the electronic circuitry that executes instructions comprising a computer program. The CPU performs basic arithmetic, logic, controlling, ...
. The
Turion 64 AMD Turion is the brand name AMD applies to its x86-64 low-power consumption (''mobile'') processors codenamed ''K8L''. The Turion 64 and Turion 64 X2/Ultra processors compete with Intel's mobile processors, initially the '' Pentium M'' and the I ...
and
Turion 64 X2 AMD Turion is the brand name AMD applies to its x86-64 low-power consumption (''mobile'') processors codenamed ''K8L''. The Turion 64 and Turion 64 X2/Ultra processors compete with Intel's mobile processors, initially the ''Pentium M'' and the I ...
processors compete with
Intel Intel Corporation is an American multinational corporation and technology company headquartered in Santa Clara, California. It is the world's largest semiconductor chip manufacturer by revenue, and is one of the developers of the x86 seri ...
's mobile processors, initially the ''
Pentium M The Pentium M is a family of mobile 32-bit single-core x86 microprocessors (with the modified Intel P6 microarchitecture) introduced in March 2003 and forming a part of the Intel Carmel notebook platform under the then new Centrino brand. The ...
'' and later the
Intel Core Intel Core is a line of streamlined midrange consumer, workstation and enthusiast computer central processing units (CPUs) marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time o ...
and
Intel Core 2 Intel Core 2 is the processor family encompassing a range of Intel's consumer 64-bit x86-64 single-, dual-, and quad-core microprocessors based on the Core microarchitecture. The single- and dual-core models are single-die, whereas the quad-cor ...
processors. Earlier Turion 64 processors are compatible with AMD's
Socket 754 Socket 754 is a CPU socket originally developed by AMD to supersede its Athlon XP platform (Socket 462, also referred to as Socket A). Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit micropro ...
. The newer "Richmond" models are designed for AMD's
Socket S1 Socket S1 is the CPU socket type used by AMD for their Turion 64, Athlon 64 Mobile, Phenom II Mobile and later Sempron processors, which debuted with the dual-core Turion 64 X2 CPUs on May 17, 2006. Technical specifications Socket S1 is a 638 ...
. They are equipped with 512 or 1024  kB of L2 cache, a 64-bit single channel on-die memory controller, and an 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
bus. Battery saving features, like ''
PowerNow! __NOTOC__ AMD PowerNow! is AMD's dynamic frequency scaling and power saving technology for laptop processors. The CPU's clock speed and VCore are automatically decreased when the computer is under low load or idle, to save battery power, reduc ...
'', are central to the marketing and usefulness of these CPUs.


Model naming methodology

The model naming scheme does not make it obvious how to compare one Turion with another, or even an Athlon 64. The model name is two letters, a dash, and a two digit number (for example, ML-34). The two letters together designate a processor class, while the number represents a
PR rating The PR (Performance Rating, P-rating) system was a figure of merit developed by AMD, Cyrix, IBM Microelectronics and SGS-Thomson in the mid-1990s (Cyrix announced it in February 1996) as a method of comparing their x86 processors to those of ri ...
. The first letter is M for single core processors and T for dual core
Turion 64 X2 AMD Turion is the brand name AMD applies to its x86-64 low-power consumption (''mobile'') processors codenamed ''K8L''. The Turion 64 and Turion 64 X2/Ultra processors compete with Intel's mobile processors, initially the ''Pentium M'' and the I ...
processors. The later in the alphabet that the second letter appears, the more the model has been designed for mobility (low power use). Take for example, an MT-30 and an ML-34. Since the T in the MT-30 is later in the alphabet than the L in ML-34, the MT-30 uses less power than the ML-34. But since 34 is greater than 30, the ML-34 is faster than the MT-30.


Athlon Neo

With 27 mm × 27 mm in size and 2.5 mm in thickness, the Athlon Neo processors utilize a new package called "ASB1", essentially a BGA package, for smaller footprint to allow smaller designs for notebooks and lowering the cost. The clock of the processors is significantly lower than desktop and other mobile counterparts to reach a low TDP, at 15W maximum for a single core x86-64 CPU at 1.6 GHz. The Athlon Neo processors are equipped with 512 kB of L2 cache and HyperTransport 1.0 running at 800 MHz frequency.


Sockets

*
Socket 754 Socket 754 is a CPU socket originally developed by AMD to supersede its Athlon XP platform (Socket 462, also referred to as Socket A). Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit micropro ...
: The Athlon 64 value/budget line, 64-bit memory interface (Single-Channel) *
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
: Athlon 64 performance line,
Athlon 64 X2 The Athlon 64 X2 is the first native dual-core desktop central processing unit (CPU) designed by Advanced Micro Devices (AMD). It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with ano ...
s, and newer Athlon 64 FXs,
Opteron Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sledg ...
, 128-bit memory interface (
Dual-channel In the fields of digital electronics and computer hardware, multi-channel memory architecture is a technology that increases the data transfer rate between the DRAM memory and the memory controller by adding more channels of communication between ...
) *
Socket 940 Socket 940 is a 940-pin socket for 64-bit AMD Opteron server processors and AMD Athlon 64 FX consumer processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the proce ...
:
Opteron Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sledg ...
and old Athlon 64 FX, 128-bit memory interface - requires registered DDR memory * Socket AM2: Athlon 64/Athlon 64 FX/Athlon 64 X2/
Sempron Sempron has been the marketing name used by AMD for several different budget desktop CPUs, using several different technologies and CPU socket formats. The Sempron replaced the AMD Duron processor and competed against Intel's Celeron series of pr ...
, 940 Pins (Not compatible with Socket 940); the first AMD socket to use DDR2 SDRAM. *
Socket F Socket F is a CPU socket designed by AMD for its Opteron line of CPUs released on August 15, 2006. In 2010 Socket F was replaced by Socket C32 for entry-level servers and Socket G34 for high-end servers. Technical specifications The socket h ...
: Opteron, 1207 Pins * Socket F (1207 FX): Athlon 64 FX on AMD Quad FX platform, also compatible for dual-processor
Opteron Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sledg ...
2200 series At the introduction of Athlon 64 in September 2003, only Socket 754 and Socket 940 (Opteron) were ready and available. The onboard memory controller was not capable of running unbuffered (non-registered) memory in dual-channel mode at the time of release; as a stopgap measure, they introduced the Athlon 64 on Socket 754, and brought out a non-multiprocessor version of the Opteron called the Athlon 64 FX, as a multiplier unlocked enthusiast part for Socket 940, comparable to Intel's Pentium 4 Extreme Edition for the high end market. In June 2004, AMD released Socket 939 as the mainstream Athlon 64 with dual-channel memory interface, leaving Socket 940 solely for the server market (Opterons), and relegating Socket 754 as a value/budget line, for Semprons and slower versions of the Athlon 64. Eventually Socket 754 replaced
Socket A Socket A (also known as Socket 462) is a zero insertion force pin grid array (PGA) CPU socket used for AMD processors ranging from the Athlon Thunderbird to the Athlon XP/MP 3200+, and AMD budget processors including the Duron and Sempron. Soc ...
for Semprons. In May 2006, AMD released Socket AM2, which provided support for the DDR2 memory interface. Also, this marked the release of AMD-V. In August 2006, AMD released Socket F for
Opteron Opteron is AMD's x86 former server and workstation processor line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64 or AMD64). It was released on April 22, 2003, with the ''Sledg ...
server CPU which uses the LGA chip form factor. In November 2006, AMD released a specialized version of Socket F, called 1207 FX, for dual-socket, dual-core Athlon FX processors on the Quad FX platform. While Socket F Opterons already allowed for four processor cores, Quad FX allowed unbuffered RAM and expanded CPU/chipset configuration in the BIOS. Consequentially, Socket F and F 1207 FX are incompatible and require different processors, chipsets, and motherboards.


Features table

CPU features table


Athlon 64 FX models


Sledgehammer (130 nm SOI)

* Stepping level: C0, CG * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 1024 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
*
Socket 940 Socket 940 is a 940-pin socket for 64-bit AMD Opteron server processors and AMD Athlon 64 FX consumer processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the proce ...
, 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) * Registered DDR-SDRAM required * CPU core voltage (VCore): 1.50 or 1.55
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 89 Watt max * First release: September 23, 2003 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2200 MHz (FX-51, C0), 2400 MHz (FX-53, C0 and CG)


Clawhammer (130 nm SOI)

* Stepping level: CG * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 1024 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.50
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 89 Watt (FX-55:104 Watt) * First release: June 1, 2004 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2400 MHz (FX-53), 2600 MHz (FX-55)


San Diego (90 nm SOI)

* Stepping level: E4, E6 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 1024 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.35 or 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 104 Watt max * First release: April 15, 2005 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2600 MHz (FX-55), 2800 MHz (FX-57)


Toledo (90 nm SOI)

Dual-core CPU * Stepping level: E6 * L1 cache: 64 + 64 kB (data + instructions), per core *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 1024 kB full speed, per core * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.30 or 1.35
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 110 Watt max * First release: January 10, 2006 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2600 MHz (FX-60)


Windsor (90 nm SOI)

Dual-core CPU * Stepping level: F2, F3 * L1 cache: 64 + 64 kB (data + instructions), per core *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 - 1024 kB full speed, per core * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * Socket AM2, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.30 V or 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 125 Watt max * First release: May 23, 2006 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2000 - 3200 MHz (6400+), 2800 MHz (FX-62)


Windsor (90 nm SOI) - Quad FX platform

Dual-core, dual CPUs (four cores total) * Stepping level: F3 * L1 cache: 64 + 64 kB (data + instructions), per core *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 1024 kB full speed, per core * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * Socket F (1207 FX), 2000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT2000) * CPU core voltage (VCore): 1.35 or 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 125 Watt max per CPU * First release: November 30, 2006 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2600 MHz (FX-70), 2800 MHz (FX-72), 3000 MHz (FX-74)


Athlon 64 models


Clawhammer (130 nm SOI)

* Stepping level: C0, CG * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 1024 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
(only CG) *
Socket 754 Socket 754 is a CPU socket originally developed by AMD to supersede its Athlon XP platform (Socket 462, also referred to as Socket A). Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit micropro ...
, 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) *
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz HyperTransport (HT1000) * CPU core voltage (VCore): 1.50
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 89 Watt max * First release: September 23, 2003 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2000–2600 MHz


Newcastle (130 nm SOI)

Also possible: ClawHammer-512 (Clawhammer with partially disabled L2 cache) * Stepping level: CG * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
*
Socket 754 Socket 754 is a CPU socket originally developed by AMD to supersede its Athlon XP platform (Socket 462, also referred to as Socket A). Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit micropro ...
, 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) *
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz HyperTransport (HT1000) * CPU core voltage (VCore): 1.50
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 89 Watt max * First release: 2004 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1800–2400 MHz


Winchester (90 nm SOI)

* Stepping level: D0 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 67 Watt max * First release: 2004 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1800–2200 MHz


Venice (90 nm SOI)

* Stepping level: E3, E6 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
*
Socket 754 Socket 754 is a CPU socket originally developed by AMD to supersede its Athlon XP platform (Socket 462, also referred to as Socket A). Socket 754 was the first socket developed by AMD to support their new consumer version of the 64 bit micropro ...
, 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) *
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz HyperTransport (HT1000) * CPU core voltage (VCore): 1.35 or 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 89 Watt max * First release: April 4, 2005 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1800–2400 MHz


San Diego (90 nm SOI)

* Stepping level: E4, E6 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 1024 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.35 or 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 89 Watt max * First release: April 15, 2005 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2200–2600 MHz


Manchester (90 nm SOI)

* Stepping level: F1 * L1 cache: 2 x 64 + 2 x 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 2 x 512 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
*
Socket 939 Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors. Av ...
, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.35
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 89 Watt max * First release: April 15, 2005 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2200–2600 MHz


Orleans (90 nm SOI)

* Stepping level: F2, F3 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 kB, 1 MB * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * Socket AM2, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.25 or 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 62 Watt max * First release: May 23, 2006 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1800–2600 MHz


Lima (65 nm SOI)

* Stepping level: G1 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * Socket AM2, 1000 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT1000) * CPU core voltage (VCore): 1.25, 1.35, or 1.40
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 45 Watt max * First release: February 20, 2007 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 2000–2800 MHz


Athlon Neo


Huron (65 nm SOI)

* Stepping level: G2 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * ASB1 package ( BGA), 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) * CPU core voltage (VCore): 1.1
Volt The volt (symbol: V) is the unit of electric potential, electric potential difference (voltage), and electromotive force in the International System of Units (SI). It is named after the Italian physicist Alessandro Volta (1745–1827). Defin ...
s * Power use ( TDP): 15 Watt max * First release: January 8, 2009 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1600 MHz


Athlon X2 Dual Core Processor L310

* Generation: K8 * 65 nm SOI * Stepping level: G * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: 512 kB, full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * ASB1 package ( BGA), 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) * Power use ( TDP): 13 Watt max *
PowerNow! __NOTOC__ AMD PowerNow! is AMD's dynamic frequency scaling and power saving technology for laptop processors. The CPU's clock speed and VCore are automatically decreased when the computer is under low load or idle, to save battery power, reduc ...
: No * P-States: 1 *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1200 MHz


Athlon X2 Dual Core Processor L335

* Generation: K8 * 65 nm SOI * Stepping level: G * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: (2*256 kB), full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
(?),
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * ASB1 package ( BGA), 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) * Power use ( TDP): 18 Watt max *
PowerNow! __NOTOC__ AMD PowerNow! is AMD's dynamic frequency scaling and power saving technology for laptop processors. The CPU's clock speed and VCore are automatically decreased when the computer is under low load or idle, to save battery power, reduc ...
: Yes *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1600 MHz


Turion Neo X2 Dual Core Processor L625

* Generation: K8 * 65 nm SOI * Stepping level: G2 * L1 cache: 64 + 64 kB (data + instructions) *
L2 cache A CPU cache is a hardware cache used by the central processing unit (CPU) of a computer to reduce the average cost (time or energy) to access data from the main memory. A cache is a smaller, faster memory, located closer to a processor core, whic ...
: (2*512 kB), full speed * MMX, Extended
3DNow! 3DNow! is a deprecated extension to the x86 instruction set developed by Advanced Micro Devices (AMD). It adds single instruction multiple data (SIMD) instructions to the base x86 instruction set, enabling it to perform vector processing of fl ...
, SSE, SSE2,
SSE3 SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions (PNI), is the third iteration of the SSE instruction set for the IA-32 (x86) architecture. Intel introduced SSE3 in early 2004 with the Prescott revis ...
,
AMD64 x86-64 (also known as x64, x86_64, AMD64, and Intel 64) is a 64-bit version of the x86 instruction set, first released in 1999. It introduced two new modes of operation, 64-bit mode and compatibility mode, along with a new 4-level paging m ...
,
Cool'n'Quiet AMD Cool'n'Quiet is a CPU dynamic frequency scaling and power saving technology introduced by AMD with its Athlon XP processor line. It works by reducing the processor's clock rate and voltage when the processor is idle. The aim of this techn ...
,
NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...
, AMD-V * ASB1 package ( BGA), 800 MHz
HyperTransport HyperTransport (HT), formerly known as Lightning Data Transport, is a technology for interconnection of computer processors. It is a bidirectional serial/ parallel high-bandwidth, low- latency point-to-point link that was introduced on Apri ...
(HT800) * Power use ( TDP): 18 Watt max *
PowerNow! __NOTOC__ AMD PowerNow! is AMD's dynamic frequency scaling and power saving technology for laptop processors. The CPU's clock speed and VCore are automatically decreased when the computer is under low load or idle, to save battery power, reduc ...
: Yes *
Clock rate In computing, the clock rate or clock speed typically refers to the frequency at which the clock generator of a processor can generate pulses, which are used to synchronize the operations of its components, and is used as an indicator of the pr ...
: 1600 MHz


Successors

The Athlon 64 was succeeded by the K10 architecture in 2007, including but not limited to the Phenom and
Phenom II Phenom II is a family of AMD's multi-core 45 nm processors using the AMD K10 microarchitecture, succeeding the original Phenom. Advanced Micro Devices released the Socket AM2+ version of Phenom II in December 2008, while Socket AM3 version ...
processors. These successors feature higher core counts per CPU, and implement Hypertransport 3.0 and Socket AM2+/AM3. As of February 2012, Athlon64 X2 processors were still available for sale.


See also

* Jim Keller *
64-bit In computer architecture, 64-bit integers, memory addresses, or other data units are those that are 64 bits wide. Also, 64-bit CPUs and ALUs are those that are based on processor registers, address buses, or data buses of that size. A compu ...
*
List of AMD Athlon 64 processors The Athlon 64 microprocessor from Advanced Micro Devices (AMD) is an eighth-generation central processing unit (CPU). Athlon 64 is targeted at the consumer market. Features overview CPU features table Single-core desktop processors Athlon 6 ...
* List of AMD Sempron processors *
List of AMD Turion processors Turion 64 is the name of a family of CPUs designed by AMD for the mobile computing market. Features overview CPU features table Single-core mobile processors Turion 64 "Lancaster" (90 nm) * All models support: ''MMX, SSE, SSE2, SSE3, Enh ...


References


External links


Facts & Assumptions about the Architecture of AMD Opteron and Athlon 64

Inside AMD's Hammer: the 64-bit architecture behind the Opteron and Athlon 64







AMD Athlon 64 technical specifications
{{AMD processors Computer-related introductions in 2003 AMD x86 microprocessors 64-bit microprocessors