computing Computing is any goal-oriented activity requiring, benefiting from, or creating computing machinery. It includes the study and experimentation of algorithmic processes, and development of both hardware and software. Computing has scientific, ...

, the term 3 GB barrier refers to a limitation of some 32-bit

operating system An operating system (OS) is system software that manages computer hardware, software resources, and provides common services for computer programs. Time-sharing operating systems schedule tasks for efficient use of the system and may also i ...

s running on

x86 x86 (also known as 80x86 or the 8086 family) is a family of complex instruction set computer (CISC) instruction set architectures initially developed by Intel based on the Intel 8086 microprocessor and its 8088 variant. The 8086 was intr ...

microprocessor A microprocessor is a computer processor where the data processing logic and control is included on a single integrated circuit, or a small number of integrated circuits. The microprocessor contains the arithmetic, logic, and control circ ...

s. It prevents the operating systems from using all of 4

GiB The byte is a unit of digital information that most commonly consists of eight bits. Historically, the byte was the number of bits used to encode a single character of text in a computer and for this reason it is the smallest addressable unit ...

() of main memory. The exact barrier varies by motherboard and I/O device configuration, particularly the size of

video RAM Dual-ported video RAM, or VRAM, is a dual-ported variant of dynamic RAM (DRAM), which was once commonly used to store the framebuffer in graphics adapters. Note that most computers and game consoles do not use this form of memory, and dual-porte ...

; it may be in the range of 2.75 GB to 3.5 GB. The barrier is not present with a 64-bit processor and 64-bit operating system, or with certain x86 hardware and an operating system such as

Linux Linux ( or ) is a family of open-source Unix-like operating systems based on the Linux kernel, an operating system kernel first released on September 17, 1991, by Linus Torvalds. Linux is typically packaged as a Linux distribution, w ...

or certain versions of

Windows Server Windows Server (formerly Windows NT Server) is a group of operating systems (OS) for servers that Microsoft has been developing since July 27, 1993. The first OS that was released for this platform was Windows NT 3.1 Advanced Server. With the r ...

and

macOS macOS (; previously OS X and originally Mac OS X) is a Unix operating system developed and marketed by Apple Inc. since 2001. It is the primary operating system for Apple's Mac computers. Within the market of desktop and lapt ...

that allow use of

Physical Address Extension In computing, Physical Address Extension (PAE), sometimes referred to as Page Address Extension, is a memory management feature for the x86 architecture. PAE was first introduced by Intel in the Pentium Pro, and later by AMD in the Athlon proces ...

(PAE) mode on x86 to access more than 4 GiB of RAM. Whatever the actual position of the "barrier", there is no code in operating system software nor any hardware architectural limit that directly imposes it. Rather, the "barrier" is the result of interactions between several aspects of both.

Physical address limits

Many 32-bit computers have 32 physical address bits and are thus limited to 4 GiB (2³²

words A word is a basic element of language that carries an objective or practical meaning, can be used on its own, and is uninterruptible. Despite the fact that language speakers often have an intuitive grasp of what a word is, there is no conse ...

) of

memory Memory is the faculty of the mind by which data or information is encoded, stored, and retrieved when needed. It is the retention of information over time for the purpose of influencing future action. If past events could not be remembered ...

. x86 processors prior to the

Pentium Pro The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel and introduced on November 1, 1995. It introduced the P6 microarchitecture (sometimes termed i686) and was originally intended to replace the original ...

have 32 or fewer physical address bits; however, most x86 processors since the Pentium Pro, which was first sold in 1995, have the Physical Address Extension (PAE) mechanism, which allows addressing up to 64 GiB (2³⁶ words) of memory. PAE is a modification of the protected mode address translation scheme which allows virtual or linear addresses to be translated to

36-bit 36-bit computers were popular in the early mainframe computer era from the 1950s through the early 1970s. Starting in the 1960s, but especially the 1970s, the introduction of 7-bit ASCII and 8-bit EBCDIC led to the move to machines using 8-bit ...

physical addresses, instead of the 32-bit addresses available without PAE. The CPU pinouts likewise provide 36 bits of physical

address line In computer architecture, a bus (shortened form of the Latin '' omnibus'', and historically also called data highway or databus) is a communication system that transfers data between components inside a computer, or between computers. This e ...

s to the motherboard. Many x86 operating systems, including any version of Linux with a PAE

kernel Kernel may refer to: Computing * Kernel (operating system), the central component of most operating systems * Kernel (image processing), a matrix used for image convolution * Compute kernel, in GPGPU programming * Kernel method, in machine learn ...

and some versions of

and

, can use PAE to address up to 64 GiB of memory on an x86 system. There are other factors that may limit this ability to use up to 64 GiB of memory, and lead to the "3 GB barrier" under certain circumstances, even on processors that implement PAE. These are described in the following sections.

Chipset and other motherboard issues

Although, as noted above, most x86 processors from the

onward are able to generate

physical address In computing, a physical address (also real address, or binary address), is a memory address that is represented in the form of a binary number on the address bus circuitry in order to enable the data bus to access a ''particular'' storage cell ...

es up to 64 GiB, the rest of the motherboard must participate in allowing RAM above the 4 GiB point to be addressed by the CPU.

Chipset In a computer system, a chipset is a set of electronic components in one or more integrated circuits known as a "Data Flow Management System" that manages the data flow between the processor, memory and peripherals. It is usually found on the mo ...

s and motherboards allowing more than 4 GiB of RAM with x86 processors do exist, but in the past, most of those intended for other than the high-end server market could access only 4 GiB of RAM. This, however, is not sufficient to explain the "3 GB barrier" that appears even when running some x86 versions of Microsoft Windows on platforms that can access more than 4 GiB of RAM.

Memory-mapped I/O and disabled RAM

Modern personal computers are built around a set of standards that depend on, among other things, the characteristics of the original

PCI bus PCI may refer to: Business and economics * Payment card industry, businesses associated with debit, credit, and other payment cards ** Payment Card Industry Data Security Standard, a set of security requirements for credit card processors * Prov ...

. The original PCI bus implemented 32-bit physical addresses and 32-bit-wide data transfers. PCI (and PCI Express and AGP) devices present at least some, if not all, of their host control interfaces via a set of

memory-mapped I/O Memory-mapped I/O (MMIO) and port-mapped I/O (PMIO) are two complementary methods of performing input/output (I/O) between the central processing unit (CPU) and peripheral devices in a computer. An alternative approach is using dedicated I/O pr ...

locations (MMIO). The address space in which these MMIO locations appear is the same address space as that used by RAM, and while RAM can exist and be addressable above the 4 GiB point, these MMIO locations decoded by I/O devices cannot be. They are limited by PCI bus specifications to addresses of 0xFFFFFFFF (2³² − 1) and below. With 4 GiB or more of RAM installed, and with RAM occupying a contiguous range of addresses starting at 0, some of the MMIO locations will overlap with RAM addresses. On machines with large amounts of video memory, MMIO locations have been found to occupy as much as 1.8 GB of the 32-bit address space. The BIOS and chipset are responsible for detecting these address conflicts and disabling access to the RAM at those locations. Due to the way bus address ranges are determined on the PCI bus, this disabling is often at a relatively large granularity, resulting in relatively large amounts of RAM being disabled.

Address remapping

x86 chipsets that can address more than 4 GiB of RAM typically also allow memory remapping (referred to in some BIOS setup screens as "

memory hole A memory hole is any mechanism for the deliberate alteration or disappearance of inconvenient or embarrassing documents, photographs, transcripts or other records, such as from a website or other archive, particularly as part of an attempt to giv ...

remapping"). In this scheme, the BIOS detects the memory address conflict and in effect relocates the interfering RAM so that it may be addressed by the processor at a new physical address that does not conflict with MMIO. On the Intel side, this feature once was limited to server chipsets; however, newer desktop chipsets like the Intel 955X and 965 and later have it as well. On the

AMD Advanced Micro Devices, Inc. (AMD) is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies for business and consumer markets. While it initially manufactur ...

side, the

AMD K8 The AMD K8 Hammer, also code-named SledgeHammer, is a computer processor microarchitecture designed by AMD as the successor to the AMD K7 Athlon microarchitecture. The K8 was the first implementation of the AMD64 64-bit extension to the x86 ins ...

and later processors' built-in memory controller had it from the beginning. As the new physical addresses are above the 4 GiB point, addressing this RAM does require that the operating system be able to use physical addresses larger than 2³². This capability is provided by PAE. Note that there is not necessarily a requirement for the operating system to support more than 4 GiB ''total'' of RAM, as the total RAM might be only 4 GiB; it is just that a portion of it appears to the CPU at ''addresses'' in the range from 4 GiB and up. This form of the 3 GB barrier affects one generation of MacBooks, lasting 1 year (Core2Duo (Merom) – November 2006 to October 2007): the prior generation was limited to 2 GiB, while later generations (November 2007 – October 2009) allowed 4 GiB through the use of PAE and memory-hole remapping, and subsequent generations (late 2009 onwards) use 64-bit processors and therefore can address over 4 GiB.

Windows version dependencies

The "non-server", or "client", x86 SKUs of

Windows XP Windows XP is a major release of Microsoft's Windows NT operating system. It was released to manufacturing on August 24, 2001, and later to retail on October 25, 2001. It is a direct upgrade to its predecessors, Windows 2000 for high-end and ...

and later operate x86 processors in PAE mode by default when the CPU present implements the

NX bit The NX bit (no-execute) is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors. However, the NX bit i ...

. Nevertheless, these operating systems do not permit addressing of physical memory above the 4 GiB address boundary. This is not an architectural limit; it is a limit imposed by Microsoft as a

workaround A workaround is a bypass of a recognized problem or limitation in a system or policy. A workaround is typically a temporary fix that implies that a genuine solution to the problem is needed. But workarounds are frequently as creative as true solut ...

for device driver compatibility issues that were discovered during testing. Thus, the "3 GB barrier" under x86 Windows "client" operating systems can therefore arise in two slightly different scenarios. In both, RAM near the 4 GiB point conflicts with memory-mapped I/O space. Either the BIOS simply disables the conflicting RAM; or, the BIOS remaps the conflicting RAM to physical addresses above the 4 GiB point, but x86 Windows client editions refuse to use physical addresses higher than that, even though they are running with PAE enabled. The conflicting RAM is therefore unavailable to the operating system whether it is remapped or not.

References

External links

How to use full 4 GB RAM in Windows 7 32 Bit (Gavotte RAMDisk in Windows 7)

Why you should forget about 4 GiB of RAM on 32-bit systems and move on
{{DEFAULTSORT:3 Gb Barrier X86 memory management Computer memory X86 architecture