|
Time Stamp Counter
The Time Stamp Counter (TSC) is a 64-bit register present on all x86 processors since the Pentium. It counts the number of CPU cycles since its reset. The instruction RDTSC returns the TSC in EDX:EAX. In x86-64 mode, RDTSC also clears the upper 32 bits of RAX and RDX. Its opcode is 0F 31. Pentium competitors such as the Cyrix 6x86 did not always have a TSC and may consider RDTSC an illegal instruction. Cyrix included a Time Stamp Counter in their MII. Use The Time Stamp Counter was once an excellent high-resolution, low-overhead way for a program to get CPU timing information. With the advent of multi-core/ hyper-threaded CPUs, systems with multiple CPUs, and hibernating operating systems, the TSC cannot be relied upon to provide accurate results — unless great care is taken to correct the possible flaws: rate of tick and whether all cores (processors) have identical values in their time-keeping registers. There is no promise that the timestamp counters of multiple CPUs on a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Clocksource On Linux Booting Screenshot
A real-time clock (RTC) is an electronic device (most often in the form of an integrated circuit) that measures the passage of time. Although the term often refers to the devices in personal computers, servers and embedded systems, RTCs are present in almost any electronic device which needs to keep accurate time of day. Terminology The term ''real-time clock'' is used to avoid confusion with ordinary hardware clocks which are only signals that govern digital electronics, and do not count time in human units. RTC should not be confused with real-time computing, which shares its three-letter acronym but does not directly relate to time of day. Purpose Although keeping time can be done without an RTC, using one has benefits: * Low power consumption (important when running from alternate power) * Frees the main system for time-critical tasks * Sometimes more accurate than other methods A GPS receiver can shorten its startup time by comparing the current time, according to its ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
BIOS
In computing, BIOS (, ; Basic Input/Output System, also known as the System BIOS, ROM BIOS, BIOS ROM or PC BIOS) is firmware used to provide runtime services for operating systems and programs and to perform hardware initialization during the booting process (power-on startup). The BIOS firmware comes pre-installed on an IBM PC or IBM PC compatible's system board and exists in some UEFI-based systems to maintain compatibility with operating systems that do not support UEFI native operation. The name originates from the Basic Input/Output System used in the CP/M operating system in 1975. The BIOS originally proprietary to the IBM PC has been reverse engineered by some companies (such as Phoenix Technologies) looking to create compatible systems. The interface of that original system serves as a ''de facto'' standard. The BIOS in modern PCs initializes and tests the system hardware components (Power-on self-test), and loads a boot loader from a mass storage device which then i ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
AMD K8
The AMD K8 Hammer, also code-named SledgeHammer, is a computer processor microarchitecture designed by AMD as the successor to the AMD K7 Athlon microarchitecture. The K8 was the first implementation of the AMD64 64-bit extension to the x86 instruction set architecture. Features CPU features table Processors Processors based on the K8 core include: * Athlon 64 - first 64-bit consumer desktop * Athlon 64 X2 - first dual-core ('X2') desktop ** Athlon X2 - later model dual-core desktop with '64' omitted * Athlon 64 FX - enthusiast desktop (multipliers unlocked) * Sempron - low-end, low-cost desktop * Opteron - server market * Turion 64 - mobile computing market * Turion 64 X2 - dual-core mobile processor The K8 core is very similar to the K7. The most radical change is the integration of the AMD64 instructions and an on-chip memory controller. The memory controller drastically reduces memory latency and is largely responsible for most of the performance gains from K7 to K ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Atom
Intel Atom is the brand name for a line of IA-32 and x86-64 instruction set ultra-low-voltage processors by Intel Corporation designed to reduce electric consumption and power dissipation in comparison with ordinary processors of the Intel Core series. Atom is mainly used in netbooks, nettops, embedded applications ranging from health care to advanced robotics, mobile Internet devices (MIDs) and phones. The line was originally designed in 45 nm complementary metal–oxide–semiconductor (CMOS) technology and subsequent models, codenamed ''Cedar'', used a 32 nm process. The first generation of Atom processors are based on the Bonnell microarchitecture. On December 21, 2009, Intel announced the ''Pine Trail'' platform, including new Atom processor code-named ''Pineview'' (Atom N450), with total kit power consumption down 20%. On December 28, 2011, Intel updated the Atom line with the ''Cedar'' processors. In December 2012, Intel launched the 64-bit ''Centerton'' family of ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Core 2 Duo
Intel Core is a line of streamlined midrange consumer, workstation and enthusiast computer central processing units (CPUs) marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level. Identical or more capable versions of Core processors are also sold as Xeon processors for the server and workstation markets. The lineup of Core processors includes the Intel Core i3, Intel Core i5, Intel Core i7, and Intel Core i9, along with the X-series of Intel Core CPUs. Outline Although Intel Core is a brand that promises no internal consistency or continuity, the processors within this family have been, for the most part, broadly similar. The first products receiving this designation were the Core Solo and Core Duo Yonah processors for mobile from the Pentium M design tree, fabricated at 65 nm and brought to market in January 2006. These are substantially differ ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Core Duo
Intel Core is a line of streamlined midrange consumer, workstation and enthusiast computer central processing units (CPUs) marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level. Identical or more capable versions of Core processors are also sold as Xeon processors for the server and workstation markets. The lineup of Core processors includes the Intel Core i3, Intel Core i5, Intel Core i7, and Intel Core i9, along with the X-series of Intel Core CPUs. Outline Although Intel Core is a brand that promises no internal consistency or continuity, the processors within this family have been, for the most part, broadly similar. The first products receiving this designation were the Core Solo and Core Duo Yonah processors for mobile from the Pentium M design tree, fabricated at 65 nm and brought to market in January 2006. These are substantially diffe ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Core Solo
Intel Core is a line of streamlined midrange consumer, workstation and enthusiast computer central processing units (CPUs) marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level. Identical or more capable versions of Core processors are also sold as Xeon processors for the server and workstation markets. The lineup of Core processors includes the Intel Core i3, Intel Core i5, Intel Core i7, and Intel Core i9, along with the X-series of Intel Core CPUs. Outline Although Intel Core is a brand that promises no internal consistency or continuity, the processors within this family have been, for the most part, broadly similar. The first products receiving this designation were the Core Solo and Core Duo Yonah processors for mobile from the Pentium M design tree, fabricated at 65 nm and brought to market in January 2006. These are substantially differ ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pentium 4
Pentium 4 is a series of single-core CPUs for desktops, laptops and entry-level servers manufactured by Intel. The processors were shipped from November 20, 2000 until August 8, 2008. The production of Netburst processors was active from 2000 until May 21, 2010. All Pentium 4 CPUs are based on the NetBurst microarchitecture. The Pentium 4 '' Willamette'' (180 nm) introduced SSE2, while the '' Prescott'' (90 nm) introduced SSE3. Later versions introduced Hyper-Threading Technology (HTT). The first Pentium 4-branded processor to implement 64-bit was the ''Prescott'' (90 nm) (February 2004), but this feature was not enabled. Intel subsequently began selling 64-bit Pentium 4s using the ''"E0" revision'' of the Prescotts, being sold on the OEM market as the Pentium 4, model F. The E0 revision also adds eXecute Disable (XD) (Intel's name for the NX bit) to Intel 64. Intel's official launch of Intel 64 (under the name EM64T at that time) in mainstream deskt ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Intel Xeon
Xeon ( ) is a brand of x86 microprocessors designed, manufactured, and marketed by Intel, targeted at the non-consumer workstation, server, and embedded system markets. It was introduced in June 1998. Xeon processors are based on the same architecture as regular desktop-grade CPUs, but have advanced features such as support for ECC memory, higher core counts, more PCI Express lanes, support for larger amounts of RAM, larger cache memory and extra provision for enterprise-grade reliability, availability and serviceability (RAS) features responsible for handling hardware exceptions through the Machine Check Architecture. They are often capable of safely continuing execution where a normal processor cannot due to these extra RAS features, depending on the type and severity of the machine-check exception (MCE). Some also support multi-socket systems with two, four, or eight sockets through use of the Ultra Path Interconnect (UPI) bus. Overview The ''Xeon'' brand has been maint ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pentium M
The Pentium M is a family of mobile 32-bit single-core x86 microprocessors (with the modified Intel P6 microarchitecture) introduced in March 2003 and forming a part of the Intel Carmel notebook platform under the then new Centrino brand. The ''Pentium M'' processors had a maximum thermal design power (TDP) of 5–27 W depending on the model, and were intended for use in laptops (thus the "M" suffix standing for ''mobile''). They evolved from the core of the last Pentium III–branded CPU by adding the front-side bus (FSB) interface of Pentium 4, an improved instruction decoding and issuing front end, improved branch prediction, SSE2 support, and a much larger cache. The first Pentium M–branded CPU, code-named Banias, was followed by Dothan. The Pentium M line was removed from the official price lists in July 2009, when the Pentium M-branded processors were succeeded by the Core-branded dual-core mobile Yonah CPU with a modified microarchitecture. It replaced the Mobile Penti ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CPUID
In the x86 architecture, the CPUID instruction (identified by a CPUID opcode) is a processor supplementary instruction (its name derived from CPU IDentification) allowing software to discover details of the processor. It was introduced by Intel in 1993 with the launch of the Pentium and SL-enhanced 486 processors. A program can use the CPUID to determine processor type and whether features such as MMX/ SSE are implemented. History Prior to the general availability of the CPUID instruction, programmers would write esoteric machine code which exploited minor differences in CPU behavior in order to determine the processor make and model. With the introduction of the 80386 processor, EDX on reset indicated the revision but this was only readable after reset and there was no standard way for applications to read the value. Outside the x86 family, developers are mostly still required to use esoteric processes (involving instruction timing or CPU fault triggers) to determine the var ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Out-of-order Execution
In computer engineering, out-of-order execution (or more formally dynamic execution) is a paradigm used in most high-performance central processing units to make use of instruction cycles that would otherwise be wasted. In this paradigm, a processor executes instructions in an order governed by the availability of input data and execution units, rather than by their original order in a program. In doing so, the processor can avoid being idle while waiting for the preceding instruction to complete and can, in the meantime, process the next instructions that are able to run immediately and independently. History Out-of-order execution is a restricted form of data flow computation, which was a major research area in computer architecture in the 1970s and early 1980s. The first machine to use out-of-order execution was the CDC 6600 (1964), designed by James E. Thornton, which uses a scoreboard to avoid conflicts. It permits an instruction to execute if its source operand (read) a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
