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Phil Kaufman Award
The Phil Kaufman Award was established in 1994 by the EDA Consortium (now the Electronic System Design Alliance, a SEMI Technology Community) to recognize individuals for their impact on electronic design by their contributions to electronic design automation (EDA). The IEEE Council on Electronic Design Automation (CEDA) became a co-sponsor in 2006. The award has been dubbed "The Nobel Prize of the EDA Industry". Contributions are evaluated in any of the following categories: * Business * Industry Direction and Promotion * Technology and Engineering * Educational and Mentoring The award was established to honor Phil Kaufman, the deceased former president of Quickturn Systems. Recipients All recipients are listed at the ESDA Phil Kaufman Award webpage. * 2022: Giovanni De Micheli, for his significant impact on the electronic system design industry through pioneering technical contributions. * 2021: Anirudh Devgan, Cadence Design Systems CEO for Distinguished Contributions ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Electronic System Design Alliance
The Electronic System Design Alliance (ESD Alliance) is the international association of companies that provide tools and services for electronic design automation. Until 2016 it was known as the Electronic Design Automation Consortium (EDA Consortium, EDAC). In 2018, the ESD Alliance became a SEMI Technology Community. It defines itself as "a forum to address technical, marketing, economic and legislative issues affecting the entire industry. It acts as the central voice to communicate and promote the value of the semiconductor design industry as a vital component of the global electronics industry". The 2016 name change reflects the expansion of its charter to address the changes in the industry towards a more system-oriented approach, embracing both integrated circuits design (its past focus) and electronic systems design. The organization, then known as EDAC, was established in 1987 and incorporation (business), incorporated in 1992. [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Mentor Graphics
Siemens EDA is a US-based electronic design automation (EDA) multinational corporation for electrical engineering and electronics, headquartered in Wilsonville, Oregon. Founded in 1981 as Mentor Graphics, the company was acquired by Siemens in 2017. The company distributes products that assist in electronic design automation, simulation tools for analog mixed-signal design, VPN solutions, and fluid dynamics and heat transfer tools. The company leveraged Apollo Computer workstations to differentiate itself within the computer-aided engineering (CAE) market with its software and hardware. History Siemens EDA was founded as Mentor Graphics in 1981 by Tom Bruggere, Gerry Langeler, and Dave Moffenbeier, all formerly of Tektronix. The company raised $55 million in funding through an initial public offering in 1984. Mentor initially wrote software that ran only in Apollo workstations. When Mentor entered the CAE market the company had two technical differentiators: the first ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Robert Dutton (engineer)
Robert W. Dutton is an American electrical engineer. At Stanford University, he is the Robert and Barbara Kleist Professor of Electrical Engineering. Dutton also serves as the undergraduate advisor for Stanford University Department of Electrical Engineering. Dutton's research interests include the process of integrated circuits fabrication, and circuit and device design and technology. In 1991, Dutton was elected a member of the National Academy of Engineering for pioneering contributions to the development of computer-aided modeling of semiconductor devices and fabrication processes. Education Dutton attended University of California, Berkeley for his BS (1966), MS (1967), and PhD (1970). Dutton came to Stanford in 1971. Career Dutton's research combined fabricating requirements with material sensitivities. His team developed software to characterize the various permutations. The software resulting from Dutton's research; SUPREM, (Stanford University Process Engineeri ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Espresso Heuristic Logic Minimizer
The ESPRESSO logic minimizer is a computer program using heuristic and specific algorithms for efficiently reducing the complexity of digital logic gate circuits. ESPRESSO-I was originally developed at IBM by Robert K. Brayton et al. in 1982. and improved as ESPRESSO-II in 1984. Richard L. Rudell later published the variant ESPRESSO-MV in 1986 and ESPRESSO-EXACT in 1987. Espresso has inspired many derivatives. Introduction Electronic devices are composed of numerous blocks of digital circuits, the combination of which performs the required task. The efficient implementation of logic functions in the form of logic gate circuits (such that no more logic gates are used than are necessary) is necessary to minimize production costs, and/or maximize a device's performance. Designing digital logic circuits All digital systems are composed of two elementary functions: memory elements for storing information, and combinational circuits that transform that information. State machine ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Formal Equivalence Checking
Formal equivalence checking process is a part of electronic design automation (EDA), commonly used during the development of digital integrated circuits, to formally prove that two representations of a circuit design exhibit exactly the same behavior. Equivalence checking and levels of abstraction In general, there is a wide range of possible definitions of functional equivalence covering comparisons between different levels of abstraction and varying granularity of timing details. *The most common approach is to consider the problem of machine equivalence which defines two synchronous design specifications functionally equivalent if, clock by clock, they produce ''exactly'' the same sequence of output signals for ''any'' valid sequence of input signals. *Microprocessor designers use equivalence checking to compare the functions specified for the instruction set architecture (ISA) with a register transfer level (RTL) implementation, ensuring that any program executed on both ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Formal Verification
In the context of hardware and software systems, formal verification is the act of proving or disproving the correctness of intended algorithms underlying a system with respect to a certain formal specification or property, using formal methods of mathematics. Formal verification can be helpful in proving the correctness of systems such as: cryptographic protocols, combinational circuits, digital circuits with internal memory, and software expressed as source code. The verification of these systems is done by providing a formal proof on an abstract mathematical model of the system, the correspondence between the mathematical model and the nature of the system being otherwise known by construction. Examples of mathematical objects often used to model systems are: finite-state machines, labelled transition systems, Petri nets, vector addition systems, timed automata, hybrid automata, process algebra, formal semantics of programming languages such as operational semantics, ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Logic Synthesis
In computer engineering, logic synthesis is a process by which an abstract specification of desired circuit behavior, typically at register transfer level (RTL), is turned into a design implementation in terms of logic gates, typically by a computer program called a ''synthesis tool''. Common examples of this process include synthesis of designs specified in hardware description languages, including VHDL and Verilog. Some synthesis tools generate bitstreams for programmable logic devices such as PALs or FPGAs, while others target the creation of ASICs. Logic synthesis is one aspect of electronic design automation. History of logic synthesis The roots of logic synthesis can be traced to the treatment of logic by George Boole (1815 to 1864), in what is now termed Boolean algebra. In 1938, Claude Shannon showed that the two-valued Boolean algebra can describe the operation of switching circuits. In the early days, logic design involved manipulating the truth table representation ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Robert K
The name Robert is an ancient Germanic given name, from Proto-Germanic "fame" and "bright" (''Hrōþiberhtaz''). Compare Old Dutch ''Robrecht'' and Old High German ''Hrodebert'' (a compound of '' Hruod'' ( non, Hróðr) "fame, glory, honour, praise, renown" and ''berht'' "bright, light, shining"). It is the second most frequently used given name of ancient Germanic origin. It is also in use as a surname. Another commonly used form of the name is Rupert. After becoming widely used in Continental Europe it entered England in its Old French form ''Robert'', where an Old English cognate form (''Hrēodbēorht'', ''Hrodberht'', ''Hrēodbēorð'', ''Hrœdbœrð'', ''Hrœdberð'', ''Hrōðberχtŕ'') had existed before the Norman Conquest. The feminine version is Roberta. The Italian, Portuguese, and Spanish form is Roberto. Robert is also a common name in many Germanic languages, including English, German, Dutch, Norwegian, Swedish, Scots, Danish, and Icelandic. It can be use ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Synopsys
Synopsys is an American electronic design automation (EDA) company that focuses on silicon design and verification, silicon intellectual property and software security and quality. Products include tools for logic synthesis and physical design of integrated circuits, simulators for development and debugging environments that assist in the design of the logic for chips and computer systems. In recent years, Synopsys has expanded its products and services to include application security testing. Synopsys has gained attention due to its relationship with various Chinese state entities. In 2018, Synopsys formed a partnership with the People's Liberation Army National Defence University and, in 2022, the company came under investigation by the United States Department of Justice for technology transfers to sanctioned entities in China. History Synopsys was founded by Aart J de Geus and David Gregory in 1986 in Research Triangle Park, North Carolina. The company was initially est ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Aart De Geus
Aart J. de Geus (born June 11, 1954) is the co-founder, chairman and co-CEO of Synopsys Inc. De Geus graduated with a master's degree in electrical engineering (1978) from the École Polytechnique Fédérale de Lausanne (Swiss Federal Institute of technology), EPFL, Switzerland followed by a Ph.D. from Southern Methodist University, Texas, United States, in 1985. De Geus was elected a member of the National Academy of Engineering in 2019 for leadership and technical contributions to logic synthesis for integrated circuits. He is also a fellow of IEEE and a Phil Kaufman Award winner. Recognition and awards ''Electronic Business'' magazine chose De Geus as one of "The 10 Most Influential Executives" of 2002. He was honored for pioneering the commercial logic synthesis market, becoming the third recipient of the IEEE Circuits and Systems Society Industrial Pioneer Award. Also in 2002, shortly after handling the largest merger in electronic design automation history, De Geus was nam ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Randal Bryant
Randal E. Bryant (born October 27, 1952) is an American computer scientist and academic noted for his research on formally verifying digital hardware and software. Bryant has been a faculty member at Carnegie Mellon University since 1984. He served as the Dean of the School of Computer Science (SCS) at Carnegie Mellon from 2004 to 2014. Dr. Bryant retired and became a Founders University Professor Emeritus on June 30th, 2020. Over the years, Dr. Bryant has received many recognitions for his research on hardware and software verification as well as algorithms and computer architecture. His 1986 paper on symbolic Boolean manipulation using Ordered Binary Decision Diagrams (BDDs) has the highest citation count of any publication in the Citeseer database of computer science literature. In 2009 Bryant was awarded the Phil Kaufman Award by the EDA Consortium "for his seminal technological breakthroughs in the area of formal verification." Early life and education Bryant was born ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Pat Pistilli
The Design Automation Conference, or DAC, is an annual event, a combination of a technical conference and a trade show, both specializing in electronic design automation (EDA). DAC is the oldest and largest conference in EDA, started in 1964. It grew out of the SHARE ("Society to Help Avoid Redundant Effort") design automation workshop. Its originators Marie Pistilli and Pasquale (Pat) Pistilli were honored by the EDA community. Pat received the highest honor in EDA industry, the Phil Kaufman Award, for this effort and Marie was honored by having an award established in her name, the Marie Pistilli Award. Up until the mid-'70s, DAC had sessions on all types of design automation, including mechanical and architectural. After that, for all intents and purposes, only topics concerned with electronic design have been included. Also until the mid-'70s, DAC was strictly a technical conference. Then a few companies started to request space to show their products, and within a few ye ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
