Operand Isolation
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Operand Isolation
In electronic low power digital synchronous circuit design, operand isolation is a technique for minimizing the energy overhead associated with redundant operations by selectively blocking the propagation of switching activity through the circuit."Overview of the power minimization techniques employed in the IBM PowerPC 4xx embedded controllers"
This technique isolates sections of the circuit (Logical operation#Computer science, operation) from "seeing" changes on their inputs (operands) unless they are expected to respond to them. This is usually done using latch (electronics), latches at the inputs of the circuit. The latches become transparent only when the result of the operation is going to be used. One can also use multiplexers or simple AND gates instead of la ...
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Synchronous Circuit
In digital electronics, a synchronous circuit is a digital circuit in which the changes in the state (computer science), state of memory elements are synchronized by a clock signal. In a sequential logic, sequential digital logic circuit, data is stored in memory devices called flip-flop (electronics), flip-flops or latches. The output of a flip-flop is constant until a pulse is applied to its "clock" input, upon which the input of the flip-flop is latched into its output. In a synchronous logic circuit, an electronic oscillator called the ''clock (computing), clock'' generates a string (sequence) of pulses, the "clock signal". This clock signal is applied to every storage element, so in an ideal synchronous circuit, every change in the logic level, logical levels of its storage components is simultaneous. Ideally, the input to each storage element has reached its final value before the next clock occurs, so the behaviour of the whole circuit can be predicted exactly. Pract ...
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