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ITRON Project
The ITRON project is the first of several sub-architectures of the TRON project. Originally undertaken in 1984, ITRON is a Japanese open standard for a real-time operating system (RTOS) initiated under the guidance of Ken Sakamura. This project aims to standardize the RTOS and related specifications for embedded systems, particularly small-scale embedded systems. The ITRON RTOS is targeted for consumer electronic devices, such as mobile phones and fax machines. Various vendors sell their own implementations of the RTOS. Details ITRON, and µITRON (sometimes also spelled uITRON or microITRON) are the name of RTOS specifications coming out of ITRON projects. 'µ' means that the particular specification is meant for the smaller 8-bit or 16-bit CPU targets. Specifications are available for free. Commercial implementations are available, and offered under many different licenses. On 10 November 2017, the Institute of Electrical and Electronics Engineers acquired ownership of the 16- and ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
TRON Project
TRON (acronym for The Real-time Operating system Nucleus) is an open architecture real-time operating system kernel design. The project was started by Professor Dr. Ken Sakamura of the University of Tokyo in 1984. The project's goal is to create an ideal computer architecture and network, to provide for all of society's needs. The Industrial TRON (ITRON) derivative was one of the world's most used operating systems in 2003, being present in billions of electronic devices such as mobile phones, appliances and even cars. Although mainly used by Japanese companies, it garnered interest worldwide. However, a dearth of quality English documentation was said to hinder its broader adoption. The TRON project was integrated into T-Engine Forum in 2010. Today, it is supported by popular Secure Socket Layer (SSL) and Transport Layer Security (TLS) libraries such as wolfSSL. Architecture TRON does not specify the source code for the kernel, but instead is a "set of interfaces and desi ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ARM Architecture
ARM (stylised in lowercase as arm, formerly an acronym for Advanced RISC Machines and originally Acorn RISC Machine) is a family of reduced instruction set computer (RISC) instruction set architectures for computer processors, configured for various environments. Arm Ltd. develops the architectures and licenses them to other companies, who design their own products that implement one or more of those architectures, including system on a chip (SoC) and system on module (SOM) designs, that incorporate different components such as memory, interfaces, and radios. It also designs cores that implement these instruction set architectures and licenses these designs to many companies that incorporate those core designs into their own products. There have been several generations of the ARM design. The original ARM1 used a 32-bit internal structure but had a 26-bit address space that limited it to 64 MB of main memory. This limitation was removed in the ARMv3 series, which h ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
CxProcess
CxProcess is the trademark of an image processing technology used in Minolta and Konica Minolta digital cameras. Image processing in a camera converts the raw image data from a CCD image sensor into the format that is stored on the memory card. This processing is one of the bottlenecks in the speed of digital cameras. Between 2001 and 2006, CxProcess was used in various Minolta and Konica Minolta digital compact cameras, bridge cameras and DSLRs. In order to distinguish the image processing algorithms from the image processor, the image processor was named SUPHEED (for ''superior image and speed'') since 2003. It can be seen as the predecessor of Sony's Bionz image processor since their taking-over of Konica Minolta's camera business in 2006. CxProcess was originally introduced with the Minolta Dimage 5 in 2001. SUPHEED was introduced with the Minolta Dimage A1 in 2003, which was also the first to implement CxProcess II. Cameras such as the Minolta Dimage 7 series (Dimage 7 ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Bionz
BIONZ is a line of image processors used in Sony digital cameras. It is currently used in many Sony α DSLR and mirrorless cameras. Image processing in the camera converts the raw data from a CCD or CMOS image sensor into the format that is stored on the memory card. This processing is one of the bottlenecks in digital camera speed, so manufacturers put much effort into making, and marketing, the fastest processors for this step that they can. Sony designs the circuitry of the processor in-house, and outsources the manufacturing to semiconductor foundries such as MegaChips and (mostly) GlobalFoundries, as they currently do not own any fabrication plant capable of producing a system on a chip (SoC). Sony also sources DRAM chips from various manufacturers namely Samsung, SK Hynix and Micron Technology. BIONZ utilizes two chips in its design. The first chip is an SoC that manages overall functionality of the camera such as SD card storage management, wired connection such a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Expeed
The Nikon Expeed image/ video processors (often styled ''EXPEED'') are media processors for Nikon's digital cameras. They perform a large number of tasks: Bayer filtering, demosaicing, image sensor corrections/dark-frame subtraction, image noise reduction, image sharpening, image scaling, gamma correction, image enhancement/Active D-Lighting, colorspace conversion, chroma subsampling, framerate conversion, lens distortion/chromatic aberration correction, image compression/ JPEG encoding, video compression, display/ video interface driving, digital image editing, face detection, audio processing/ compression/ encoding and computer data storage/data transmission. Expeed's multi-processor system on a chip solution integrates an image processor in multi-core processor architecture, with each single processor-core able to compute many instructions/operations in parallel. Storage and display interfaces and other modules are added and a digital signal processor (DSP) increases the ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Java (software Platform)
Java is a set of computer software and specifications developed by James Gosling at Sun Microsystems, which was later acquired by the Oracle Corporation, that provides a system for developing application software and deploying it in a cross-platform computing environment. Java is used in a wide variety of computing platforms from embedded devices and mobile phones to enterprise servers and supercomputers. Java applets, which are less common than standalone Java applications, were commonly run in secure, sandboxed environments to provide many features of native applications through being embedded in HTML pages. Writing in the Java programming language is the primary way to produce code that will be deployed as byte code in a Java virtual machine (JVM); byte code compilers are also available for other languages, including Ada, JavaScript, Python, and Ruby. In addition, several languages have been designed to run natively on the JVM, including Clojure, Groovy, and Scal ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
T-Kernel
T-Kernel is an open source real-time operating system (RTOS) designed for 32-bit microcontrollers. It is standardized by the T-Engine Forum, which distributes it under a ''T-License'' agreement. There is also a corresponding Micro T-Kernel (μT-Kernel) implementation designed for embedded systems with 16-bit or 8-bit microcontrollers. History In 1984 professor Ken Sakamura started The Real-time Operating system Nucleus (TRON project) at the University of Tokyo, with the goal of designing an open real-time operating system (RTOS) kernel. The TRON framework defines a complete architecture for the different computing units. Industrial TRON (ITRON) is the most popular TRON architecture. ITRON specification promotion was done by the various companies which sell the commercial implementations. T-Kernel is the name of the specification and at the same time a single implementation based on the authorized source code available from the T-Engine Forum for free under T-License. T-Engine is arg ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
FR-V
The Fujitsu FR-V (Fujitsu RISC- VLIW) is one of the very few processors ever able to process both a very long instruction word (VLIW) and vector processor instructions at the same time, increasing throughput with high parallel computing while increasing performance per watt and hardware efficiency. The family was presented in 1999. Its design was influenced by the VPP500/5000 models of the Fujitsu VP/2000 vector processor supercomputer line. Featuring a 1–8 way very long instruction word (VLIW, Multiple Instruction Multiple Data (MIMD), up to 256 bit) instruction set it additionally uses a 4-way single instruction, multiple data (SIMD) vector processor core. A 32-bit RISC instruction set in the superscalar core is combined with most variants integrating a dual 16-bit media processor also in VLIW and vector architecture. Each processor core is superpipelined as well as 4-unit superscalar. A typical integrated circuit integrates a system on a chip and further multiplies speed ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
MIPS Architecture
MIPS (Microprocessor without Interlocked Pipelined Stages) is a family of reduced instruction set computer (RISC) instruction set architectures (ISA)Price, Charles (September 1995). ''MIPS IV Instruction Set'' (Revision 3.2), MIPS Technologies, Inc. developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. There are multiple versions of MIPS: including MIPS I, II, III, IV, and V; as well as five releases of MIPS32/64 (for 32- and 64-bit implementations, respectively). The early MIPS architectures were 32-bit; 64-bit versions were developed later. As of April 2017, the current version of MIPS is MIPS32/64 Release 6. MIPS32/64 primarily differs from MIPS I–V by defining the privileged kernel mode System Control Coprocessor in addition to the user mode architecture. The MIPS architecture has several optional extensions. MIPS-3D which is a simple set of floating-point SIMD instructions dedicated to common 3D tasks, MDMX (MaDMaX) which is a more extens ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
RTEMS
Real-Time Executive for Multiprocessor Systems (RTEMS), formerly Real-Time Executive for Missile Systems, and then Real-Time Executive for Military Systems, is a real-time operating system (RTOS) designed for embedded systems. It is free and open-source software. Development began in the late 1980s with early versions available via File Transfer Protocol (ftp) as early as 1993. OAR Corporation is currently managing the RTEMS project in cooperation with a steering committee which includes user representatives. Design RTEMS is designed for real-time, embedded systems and to support various open application programming interface ( API) standards including Portable Operating System Interface (POSIX) and µITRON. The API now known as the Classic RTEMS API was originally based on the Real-Time Executive Interface Definition (RTEID) specification. RTEMS includes a port of the FreeBSD Internet protocol suite (TCP/IP stack) and support for various file systems including Network File Syste ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Open Standard
An open standard is a standard that is openly accessible and usable by anyone. It is also a prerequisite to use open license, non-discrimination and extensibility. Typically, anybody can participate in the development. There is no single definition, and interpretations vary with usage. The terms ''open'' and ''standard'' have a wide range of meanings associated with their usage. There are a number of definitions of open standards which emphasize different aspects of openness, including the openness of the resulting specification, the openness of the drafting process, and the ownership of rights in the standard. The term "standard" is sometimes restricted to technologies approved by formalized committees that are open to participation by all interested parties and operate on a consensus basis. The definitions of the term ''open standard'' used by academics, the European Union, and some of its member governments or parliaments such as Denmark, France, and Spain preclude open standar ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
ECos
The Embedded Configurable Operating System (eCos) is a free and open-source real-time operating system intended for embedded systems and applications which need only one process with multiple threads. It is designed to be customizable to precise application requirements of run-time performance and hardware needs. It is implemented in the programming languages C and C++ and has compatibility layers and application programming interfaces for Portable Operating System Interface (POSIX) and The Real-time Operating system Nucleus (TRON) variant µITRON. eCos is supported by popular SSL/TLS libraries such as wolfSSL, thus meeting all standards for embedded security. Design eCos was designed for devices with memory sizes in the range of a few tens or several hundred kilobytes, or for applications with real-time requirements. eCos runs on a wide variety of hardware platforms, including ARM, CalmRISC, FR-V, Hitachi H8, IA-32, Motorola 68000, Matsushita AM3x, MIPS, NEC V850, Nios ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
