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Grøstl
Grøstl is a cryptographic hash function submitted to the NIST hash function competition by Praveen Gauravaram, Lars Knudsen, Krystian Matusiewicz, Florian Mendel, Christian Rechberger, Martin Schläffer, and Søren S. Thomsen. Grøstl was chosen as one of the five finalists of the competition. It uses the same S-box as AES in a custom construction. The authors claim speeds of up to 21.4 cycles per byte on an Intel Core 2 Duo, and 9.6 cycles/byte on an Intel i7 with AES-NI. According to the submission document, the name "Grøstl" is a multilingual play-on-words, referring to an Austrian dish that is very similar to hash (food). Like other hash functions in the MD5/SHA family, Grøstl divides the input into blocks and iteratively computes ''hi'' = ''f''(''h''''i''−1, ''mi''). However, Grøstl maintains a hash state at least twice the size of the final output (512 or 1024 bits), which is only truncated at the end of hash computation. The compression function ''f'' is based o ...
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NIST Hash Function Competition
The NIST hash function competition was an open competition held by the US National Institute of Standards and Technology (NIST) to develop a new hash function called SHA-3 to complement the older SHA-1 and SHA-2. The competition was formally announced in the ''Federal Register'' on November 2, 2007. "NIST is initiating an effort to develop one or more additional hash algorithms through a public competition, similar to the development process for the Advanced Encryption Standard (AES)." The competition ended on October 2, 2012, when NIST announced that Keccak would be the new SHA-3 hash algorithm. The winning hash function has been published as NIST FIPS 202 the "SHA-3 Standard", to complement FIPS 180-4, the '' Secure Hash Standard''. The NIST competition has inspired other competitions such as the Password Hashing Competition. Process Submissions were due October 31, 2008 and the list of candidates accepted for the first round was published on December 9, 2008. NIST held ...
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AES-NI
An Advanced Encryption Standard instruction set (AES instruction set) is a set of instructions that are specifically designed to perform AES encryption and decryption operations efficiently. These instructions are typically found in modern processors and can greatly accelerate AES operations compared to software implementations. An AES instruction set includes instructions for key expansion, encryption, and decryption using various key sizes (128-bit, 192-bit, and 256-bit). The instruction set is often implemented as a set of instructions that can perform a single round of AES along with a special version for the last round which has a slightly different method. When AES is implemented as an instruction set instead of as software, it can have improved security, as its side channel attack surface is reduced. x86 architecture processors AES-NI (or the Intel Advanced Encryption Standard New Instructions; AES-NI) was the first major implementation. AES-NI is an extension to the ...
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Lars Knudsen
Lars Ramkilde Knudsen (born 21 February 1962) is a Denmark, Danish researcher in cryptography, particularly interested in the design and cryptanalysis, analysis of block ciphers, cryptographic hash function, hash functions and message authentication codes (MACs). Academic After some early work in banking, Knudsen enrolled at Aarhus University in 1984 studying mathematics and computer science, gaining an MSc in 1992 and a PhD in 1994. In 1999 he became a professor at the University of Bergen, Norway and in 2001 he became a professor at the Technical University of Denmark (DTU). Ivan Damgård was Lars' mentor during his studies at Aarhus University. Publications Knudsen has published a couple of papers on cryptanalysis of cryptographic primitives, including the R-MAC scheme, the SHA-1 and MD2 (cryptography), MD2 hash functions, and a couple of block ciphers: Data Encryption Standard, DES, DFC (cipher), DFC, IDEA (cipher), IDEA, ICE (cipher), ICE, LOKI, MISTY, RC2, RC5, RC6, SC200 ...
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Praveen Gauravaram
The meaning of ''"Praveen"'' in the Sanskrit language is "skilled" or "talented" or "Honest" .It is most often a male name and a given name, and less commonly a surname. A prevalent modern name, it has been adapted into many other languages. In various languages of South Asia, "praveen" is a word which refers to specialty. For example, in the Telugu language, saṅgeetam-lō pravīṇuḍu (సంగీతంలో ప్రవీణుడు) refers to a person who is skilled in music. The name ''"Praveen"'' was first used by royal heirs of the Ancient South-Indian Kingdoms who were born during the "Rudhrodhgaari" (57th year) of the 60-year cycle of the Tamil Calendar derived from ancient astronomical data, known as the "Tirukkanda Panchanga". (cf. The Secret Doctrine, 2:49-51) Notable people * Praveen Chaudhari, Indian American physicist, former director of Brookhaven National Laboratory * Praveen Thipsay, Indian chess grandmaster * Praveen Swami, Indian security analyst, journ ...
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Cryptographic Hash Function
A cryptographic hash function (CHF) is a hash algorithm (a map (mathematics), map of an arbitrary binary string to a binary string with a fixed size of n bits) that has special properties desirable for a cryptography, cryptographic application: * the probability of a particular n-bit output result (hash value) for a random input string ("message") is 2^ (as for any good hash), so the hash value can be used as a representative of the message; * finding an input string that matches a given hash value (a ''pre-image'') is infeasible, ''assuming all input strings are equally likely.'' The ''resistance'' to such search is quantified as security strength: a cryptographic hash with n bits of hash value is expected to have a ''preimage resistance'' strength of n bits, unless the space of possible input values is significantly smaller than 2^ (a practical example can be found in ); * a ''second preimage'' resistance strength, with the same expectations, refers to a similar problem of f ...
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Avalanche Effect
In cryptography, the avalanche effect is the desirable property of cryptographic algorithms, typically block ciphers and cryptographic hash functions, wherein if an input is changed slightly (for example, flipping a single bit), the output changes significantly (e.g., half the output bits flip). In the case of high-quality block ciphers, such a small change in either the key or the plaintext should cause a drastic change in the ciphertext. The actual term was first used by Horst Feistel, although the concept dates back to at least Shannon's ''diffusion''. If a block cipher or cryptographic hash function does not exhibit the avalanche effect to a significant degree, then it has poor randomization, and thus a cryptanalyst can make predictions about the input, being given only the output. This may be sufficient to partially or completely break the algorithm. Thus, the avalanche effect is a desirable condition from the point of view of the designer of the cryptographic algorithm or ...
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Rijndael
The Advanced Encryption Standard (AES), also known by its original name Rijndael (), is a specification for the encryption of electronic data established by the U.S. National Institute of Standards and Technology (NIST) in 2001. AES is a variant of the Rijndael block cipher developed by two Belgian cryptographers, Joan Daemen and Vincent Rijmen, who submitted a proposal to NIST during the AES selection process. Rijndael is a family of ciphers with different key and block sizes. For AES, NIST selected three members of the Rijndael family, each with a block size of 128 bits, but three different key lengths: 128, 192 and 256 bits. AES has been adopted by the U.S. government. It supersedes the Data Encryption Standard (DES), which was published in 1977. The algorithm described by AES is a symmetric-key algorithm, meaning the same key is used for both encrypting and decrypting the data. In the United States, AES was announced by the NIST as U.S. FIPS PUB 197 (FIPS 197) on Novem ...
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Hash (food)
Hash is a dish consisting of chopped meat, potatoes, and fried onions. The name is derived from French language, French , meaning 'to chop'. Canned corned beef hash became especially popular in countries such as Britain and France during and after the Second World War as rationing limited the availability of fresh meat. Hash may be served for breakfast, lunch, or supper. When served for breakfast in the United States, hash may come with eggs, toast, hollandaise sauce, or baked beans. High-end restaurants offer sophisticated hash dishes on their menus. Modern preparations have been made with unconventional ingredients such as lamb, fish, venison, turkey, chicken, shrimp, or steak. United States "Hash" of many forms was part of the Standard American diet, American diet since at least the 18th century, as is attested by the availability of numerous recipes and the existence of many "hash houses" named after the dish. William Rice, Chicago Tribune In the United States, Sep ...
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Intel I7
Intel Core is a line of multi-core (with the exception of Core Solo and Core 2 Solo) central processing units (CPUs) for Midrange computer, midrange, embedded, workstation, high-end and enthusiast computer markets marketed by Intel Corporation. These processors displaced the existing mid- to high-end Pentium processors at the time of their introduction, moving the Pentium to the entry level. Identical or more capable versions of Core processors are also sold as Xeon processors for the Server (computing), server and workstation markets. Core was launched in January 2006 as a mobile-only series, consisting of single- and dual-core models. It was then succeeded later in July by the Core 2 series, which included both desktop and mobile processors with up to four cores, and introduced 64-bit support. Since 2008, Intel began introducing the Core i3, Core i5, Core i7 and Core i9 lineup of processors, succeeding Core 2. A new naming scheme debuted in 2023, consisting of Core 3, Core ...
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Intel Core 2
Intel Core 2 is a processor family encompassing a range of Intel's mainstream 64-bit x86-64 single-, dual-, and quad-core microprocessors based on the Core microarchitecture. The single- and dual-core models are single- die, whereas the quad-core models comprise two dies, each containing two cores, packaged in a multi-chip module. The Core 2 range is the last flagship range of Intel desktop processors to use a front-side bus (FSB). The introduction of Core 2 relegated the Pentium brand to the mid-range market, and reunified laptop and desktop CPU lines for marketing purposes under the same product name, which were formerly divided into the Pentium 4, Pentium D, and Core Solo/Duo brands. The ''Core 2'' processor line was introduced on July 27, 2006, comprising the ''Duo'' (dual-core) and ''Extreme'' (dual- or quad-core CPUs for enthusiasts), and in 2007, the ''Quad'' ( quad-core) and ''Solo'' ( single-core) sub-brands. Intel Core 2 processors with vPro technology (designed f ...
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S-box
In cryptography, an S-box (substitution-box) is a basic component of symmetric key algorithms which performs substitution. In block ciphers, they are typically used to obscure the relationship between the key and the ciphertext, thus ensuring Claude Shannon, Shannon's property of confusion and diffusion, confusion. Mathematically, an S-box is a nonlinear vectorial Boolean function. In general, an S-box takes some number of input bits, ''m'', and transforms them into some number of output bits, ''n'', where ''n'' is not necessarily equal to ''m''. An ''m''×''n'' S-box can be implemented as a lookup table with 2''m'' words of ''n'' bits each. Fixed tables are normally used, as in the Data Encryption Standard (DES), but in some ciphers the tables are generated dynamically from the cryptographic key, key (e.g. the Blowfish (cipher), Blowfish and the Twofish encryption algorithms). Example One good example of a fixed table is the S-box from DES (S5), mapping 6-bit input into a 4-bi ...
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Core 2
Intel Core 2 is a processor family encompassing a range of Intel's mainstream 64-bit x86-64 single-, dual-, and quad-core microprocessors based on the Core microarchitecture. The single- and dual-core models are single- die, whereas the quad-core models comprise two dies, each containing two cores, packaged in a multi-chip module. The Core 2 range is the last flagship range of Intel desktop processors to use a front-side bus (FSB). The introduction of Core 2 relegated the Pentium brand to the mid-range market, and reunified laptop and desktop CPU lines for marketing purposes under the same product name, which were formerly divided into the Pentium 4, Pentium D, and Core Solo/Duo brands. The ''Core 2'' processor line was introduced on July 27, 2006, comprising the ''Duo'' ( dual-core) and ''Extreme'' (dual- or quad-core CPUs for enthusiasts), and in 2007, the ''Quad'' ( quad-core) and ''Solo'' ( single-core) sub-brands. Intel Core 2 processors with vPro technology (desig ...
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