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DMA Attack
A DMA attack is a type of side channel attack in computer security, in which an attacker can penetrate a computer or other device, by exploiting the presence of high-speed expansion ports that permit direct memory access (DMA). DMA is included in a number of connections, because it allows a connected device (such as a camcorder, network card, storage device or other useful accessory or internal PC card) to transfer data between itself and the computer at the maximum speed possible, by using direct hardware access to read or write directly to main memory without any operating system supervision or interaction. The legitimate uses of such devices have led to wide adoption of DMA accessories and connections, but an attacker can equally use the same facility to create an accessory that will connect using the same port, and can then potentially gain direct access to part or all of the physical memory address space of the computer, bypassing all OS security mechanisms and any lock sc ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Side Channel Attack
In computer security, a side-channel attack is a type of security exploit that leverages information inadvertently leaked by a system—such as timing, power consumption, or electromagnetic or acoustic emissions—to gain unauthorized access to sensitive information. These attacks differ from those targeting flaws in the design of cryptographic protocols or algorithms. (Cryptanalysis may identify vulnerabilities relevant to both types of attacks). Some side-channel attacks require technical knowledge of the internal operation of the system, others such as differential power analysis are effective as black-box attacks. The rise of Web 2.0 applications and software-as-a-service has also significantly raised the possibility of side-channel attacks on the web, even when transmissions between a web browser and server are encrypted (e.g. through HTTPS or WiFi encryption), according to researchers from Microsoft Research and Indiana University. Attempts to break a cryptosystem by dece ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
UEFI
Unified Extensible Firmware Interface (UEFI, as an acronym) is a Specification (technical standard), specification for the firmware Software architecture, architecture of a computing platform. When a computer booting, is powered on, the UEFI implementation is typically the first that runs, before starting the operating system. Examples include AMI Aptio, Phoenix Technologies, Phoenix SecureCore, TianoCore EDK II, and InsydeH2O. UEFI replaces the BIOS that was present in the boot ROM of all personal computers that are IBM PC compatible, although it can provide Backward compatibility, backwards compatibility with the BIOS using #CSM booting, CSM booting. Unlike its predecessor, BIOS, which is a de facto standard originally created by IBM as proprietary software, UEFI is an open standard maintained by an industry consortium. Like BIOS, most UEFI implementations are proprietary. Intel developed the original ''Extensible Firmware Interface'' (''EFI'') specification. The last Inte ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Spoofing Attack
In the context of information security, and especially network security, a spoofing attack is a situation in which a person or program successfully identifies as another by falsifying data, to gain an illegitimate advantage. Internet Spoofing and TCP/IP Many of the protocols in the TCP/IP suite do not provide mechanisms for authenticating the source or destination of a message, leaving them vulnerable to spoofing attacks when extra precautions are not taken by applications to verify the identity of the sending or receiving host. IP spoofing and ARP spoofing in particular may be used to leverage man-in-the-middle attacks against hosts on a computer network. Spoofing attacks which take advantage of TCP/IP suite protocols may be mitigated with the use of firewalls capable of deep packet inspection or by taking measures to verify the identity of the sender or recipient of a message. Domain name spoofing The term 'Domain name spoofing' (or simply though less accurately, 'Domain ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Serial Bus Protocol 2
The Serial Bus Protocol 2 (SBP-2) standard is a transport protocol within the Serial Bus, IEEE Std 1394-1995 (also known as FireWire or i.Link), developed by T10. Original work on Serial Bus Protocol started as an attempt to adapt SCSI to IEEE Std 1394-1995 serial interface. Later on it was recognized that SBP-2 may have a more general use, and the work on the standard was targeted to provide a generic framework for delivery of commands, data, and status between Serial Bus peripherals. See also * IEEE 1394 * DMA attack * USB Universal Serial Bus (USB) is an industry standard, developed by USB Implementers Forum (USB-IF), for digital data transmission and power delivery between many types of electronics. It specifies the architecture, in particular the physical ... References External links * tp://ftp.iol.unh.edu/pub/1394/sbp2-csl.ppt An overview IEEE standards {{compu-stub ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Open Host Controller Interface
A USB and Firewire Host Controller Interface (UFHC) is a register-level interface that enables a host controller for USB or IEEE 1394 hardware to communicate with a host controller driver in software. The driver software is typically provided with an operating system of a personal computer, but may also be implemented by application-specific devices such as a microcontroller. On the expansion card or motherboard controller, this involves much custom logic, with digital logic engines in the motherboard's controller chip, plus analog circuitry managing the high-speed differential signals. On the software side, it requires a device driver (called a Host Controller Driver, or HCD). IEEE 1394 Open Host Controller Interface Open Host Controller Interface (OHCI) is an open standard. When applied to an IEEE 1394 (also known as FireWire; i.LINK or Lynx) card, OHCI means that the card supports a standard interface to the PC and can be used by the OHCI IEEE 1394 drivers that come with al ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Memory Management Unit
A memory management unit (MMU), sometimes called paged memory management unit (PMMU), is a computer hardware unit that examines all references to computer memory, memory, and translates the memory addresses being referenced, known as virtual memory addresses, into physical addresses in main memory. In modern systems, programs generally have addresses that access the theoretical maximum memory of the computer architecture, 32 or 64 bits. The MMU maps the addresses from each program into separate areas in physical memory, which is generally much smaller than the theoretical maximum. This is possible because programs rarely use large amounts of memory at any one time. Most modern operating systems (OS) work in concert with an MMU to provide virtual memory (VM) support. The MMU tracks memory use in fixed-size blocks known as ''pages''. If a program refers to a location in a page that is not in physical memory, the MMU sends an interrupt to the operating system. The OS selects a ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
User-mode
In computer science, hierarchical protection domains, often called protection rings, are mechanisms to protect data and functionality from faults (by improving fault tolerance) and malicious behavior (by providing computer security). Computer operating systems provide different levels of access to resources. A protection ring is one of two or more hierarchical ''levels'' or ''layers'' of Privilege (computing), privilege within the architecture of a computer system. This is generally hardware-enforced by some Central processing unit, CPU Computer architecture, architectures that provide different CPU modes at the hardware or microcode abstraction layer, level. Rings are arranged in a hierarchy from most privileged (most trusted, usually numbered zero) to least privileged (least trusted, usually with the highest ring number). On most operating systems, Ring 0 is the level with the most privileges and interacts most directly with the physical hardware such as certain CPU functiona ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PCI Express
PCI Express (Peripheral Component Interconnect Express), officially abbreviated as PCIe, is a high-speed standard used to connect hardware components inside computers. It is designed to replace older expansion bus standards such as Peripheral Component Interconnect, PCI, PCI-X and Accelerated Graphics Port, AGP. Developed and maintained by the PCI-SIG (PCI Special Interest Group), PCIe is commonly used to connect graphics cards, sound cards, Wi-Fi and Ethernet adapters, and storage devices such as solid-state drives and hard disk drives. Compared to earlier standards, PCIe supports faster data transfer, uses fewer pins, takes up less space, and allows devices to be added or removed while the computer is running (hot swapping). It also includes better error detection and supports newer features like I/O virtualization for advanced computing needs. PCIe connections are made through "lanes," which are pairs of wires that send and receive data. Devices can use one or more lanes ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
PCI-X
PCI-X, short for Peripheral Component Interconnect eXtended, is a computer bus and expansion card standard that enhances the 32-bit Conventional PCI, PCI local bus for higher Bandwidth (computing), bandwidth demanded mostly by Server (computing), servers and workstations. It uses a modified protocol to support higher Clock rate, clock speeds (up to 133 MHz), but is otherwise similar in electrical implementation. PCI-X 2.0 added speeds up to 533 MHz, with a reduction in electrical signal levels. The slot is physically a 3.3 V PCI slot, with the same size, location and pin assignments. The electrical specifications are compatible, but stricter. However, while most conventional PCI slots are the 85 mm long 32-bit version, most PCI-X devices use the 130 mm long 64-bit slot, to the point that 64-bit PCI connectors and PCI-X support are seen as synonymous. PCI-X is specified for both 32-bit computing, 32- and 64-bit computing, 64-bit PCI connectors, and PCI-X ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Peripheral Component Interconnect
Peripheral Component Interconnect (PCI) is a local computer bus for attaching hardware devices in a computer and is part of the PCI Local Bus standard. The PCI bus supports the functions found on a processor bus but in a standardized format that is independent of any given processor's native bus. Devices connected to the PCI bus appear to a bus master to be connected directly to its own bus and are assigned addresses in the processor's address space. It is a parallel bus, synchronous to a single bus clock. Attached devices can take either the form of an integrated circuit fitted onto the motherboard (called a ''planar device'' in the PCI specification) or an expansion card that fits into a slot. The PCI Local Bus was first implemented in IBM PC compatibles, where it displaced the combination of several slow Industry Standard Architecture (ISA) slots and one fast VESA Local Bus (VLB) slot as the bus configuration. It has subsequently been adopted for other computer types ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
USB 4
Universal Serial Bus 4 (USB4), sometimes erroneously referred to as USB 4.0, is the most recent technical specification of the USB (Universal Serial Bus) data communication standard. The USB Implementers Forum originally announced USB4 in 2019. USB4 enables multiple devices to dynamically share a single high-speed data link. USB4 defines bit rates of 20 Gbit/s, 40 Gbit/s and 80 Gbit/s. USB4 is only defined for USB-C connectors and its Type-C specification regulates the connector, cables and also power delivery features across all uses of USB-C cables, in part with the USB Power Delivery specification. The USB4 standard mandates backwards compatibility to USB 3.x and dedicated backward compatibility with USB 2.0. The dynamic sharing of bandwidth of a USB4 connection is achieved by encapsulating multiple virtual connections ("tunnels") of other protocols, such as USB 3.x, USB4, DisplayPort and PCI Express. USB4 is based on the Thunderbolt 3 protocol. However, it is different en ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
Thunderbolt (interface)
Thunderbolt is the brand name of a Interface (computing)#Hardware interfaces, hardware interface for the connection of external peripherals to a computer. It was developed by Intel in collaboration with Apple Inc., Apple. It was initially marketed under the name Light Peak, and first sold as part of an end-user product on 24 February 2011. Thunderbolt combines PCI Express (PCIe) and DisplayPort (DP) into two Serial communication, serial signals and provides Direct current, DC power via a single cable. Up to six peripherals may be supported by one connector through various Network topology, topologies. Thunderbolt 1 and 2 use the same electrical connector, connector as Mini DisplayPort (MDP), whereas Thunderbolt 3, 4, and 5 use the USB-C connector, and support USB devices. Description Thunderbolt controllers multiplexing, multiplex one or more individual data lanes from connected PCIe and DisplayPort devices for transmission via two duplex Thunderbolt lanes, then de-multip ... [...More Info...] [...Related Items...] OR: [Wikipedia] [Google] [Baidu] |
